- 您現在的位置：買賣IC網 > PDF目錄363666 > NSC800N (National Semiconductor Corporation) NSC800TM High-Performance Low-Power CMOS Microprocessor PDF資料下載
參數資料
| 型號： | NSC800N |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | NSC800TM High-Performance Low-Power CMOS Microprocessor |
| 中文描述： | NSC800TM高性能低功耗CMOS微處理器 |
| 文件頁數： | 31/76頁 |
| 文件大?。?/td> | 785K |
| 代理商： | NSC800N |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁當前第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁
12.0 Instruction Set
(Continued)
12.2 INSTRUCTION SET MNEMONIC NOTATION
In the following instruction set listing, the notations used are
shown below.
b:
Designates one bit in a register or memory location.
Bit address mode uses this indicator.
cc:
Designates condition codes used in conditional
Jumps, Calls, and Return instruction; may be:
NZ
e
Non-Zero (Z flag
e
0)
Z
e
Zero (Z flag
e
1)
NC
e
Non-Carry (C flag
e
0)
C
e
Carry (C flag
e
1)
PO
e
Parity Odd or No Overflow (P/V
e
0)
PE
e
Parity Even or Overflow (P/V
e
1)
P
e
Positive (S
e
0)
M
e
Negative (S
e
1)
Designates an 8-bit signed complement displace-
ment. Relative or indexed address modes use this
indicator.
d:
kk:
Subset of cc condition codes used in conjunction with
conditional relative jumps; may be NZ, Z, NC or C.
Designates (HL), (IX
a
d) or (IY
a
d). Register indirect
or indexed address modes use this indicator.
m
1
:
m
2
:
Designates (BC), (DE) or (nn). Register indirect or di-
rect address modes use this indicator.
n:
Any 8-bit binary number.
nn:
Any 16-bit binary number.
p:
Designates restart vectors and may be the hex values
0, 8, 10, 18, 20, 28, 30 or 38. Restart instructions
employing the modified page zero addressing mode
use this indicator.
pp:
Designates the BC, DE, SP or any 16-bit register used
as a destination operand in 16-bit arithmetic opera-
tions employing the register address mode.
qq:
Designates BC, DE, HL, A, F, IX, or IY during opera-
tions employing register address mode.
r:
Designates A, B, C, D, E, H or L. Register addressing
modes use this indicator.
rr:
Designates BC, DE, HL, SP, IX or IY. Register ad-
dressing modes use this indicator.
ss:
Designates HL, IX or IY. Register addressing modes
use this indicator.
X
L
:
Subscript L indicates the lower-order byte of a 16-bit
register.
X
H
:
Subscript H indicates the high-order byte of a 16-bit
register.
( ):
parentheses indicate the contents are considered a
pointer address to a memory or I/O location.
12.3 ASSEMBLED OBJECT CODE NOTATION
Register Codes:
r
Register
rp
000
B
00
001
C
01
010
D
10
011
E
11
Register
BC
DE
HL
SP
rs
00
01
10
11
Register
BC
DE
HL
AF
100
101
111
H
L
A
pp
00
01
10
11
Register
BC
DE
IX
SP
qq
00
01
10
11
Register
BC
DE
HL
AF
Conditions Codes:
cc
000
001
010
011
100
101
110
111
kk
00
01
10
11
Mnemonic
NZ
Z
NC
C
PO
PE
P
M
Mnemonic
NZ
Z
NC
C
True Flag Condition
Z
e
0
Z
e
1
C
e
0
C
e
1
P/V
e
0
P/V
e
1
S
e
0
S
e
1
True Flag Condition
Z
e
0
Z
e
1
C
e
0
C
e
1
Restart Addresses:
t
000
001
010
011
100
101
110
111
T
X’00
X’08
X’10
X’18
X’20
X’28
X’30
X’38
31
相關PDF資料 |
PDF描述 |
|---|---|
| NSC800V | NSC800TM High-Performance Low-Power CMOS Microprocessor |
| NSC858 | NSC858 Universal Asynchronous Receiver/Transmitter |
| NSC858D | NSC858 Universal Asynchronous Receiver/Transmitter |
| NSC858E | NSC858 Universal Asynchronous Receiver/Transmitter |
| NSC858N | NSC858 Universal Asynchronous Receiver/Transmitter |
相關代理商/技術參數 |
參數描述 |
|---|---|
| NSC800N/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microprocessor |
| NSC800N/B+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microprocessor |
| NSC800N-1 | 制造商:Texas Instruments 功能描述: |
| NSC800N-1/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microprocessor |
| NSC800N-1/B+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microprocessor |
發(fā)布緊急采購，3分鐘左右您將得到回復。