參數(shù)資料
型號(hào)： NSC800N
廠(chǎng)商： National Semiconductor Corporation
英文描述： NSC800TM High-Performance Low-Power CMOS Microprocessor
中文描述： NSC800TM高性能低功耗CMOS微處理器
文件頁(yè)數(shù)： 29/76頁(yè)
文件大小： 785K
代理商： NSC800N
12.1 Instruction Set Index
(Continued)
Alphabetical
Assembly
Mnemonic
Operation
Page
DI
DJNZ,d
Disable interrupts
Decrement B and jump relative B
i
0
54
56
EI
EX (SP),ss
EX AF,A’F’
EX DE,HL
EXX
Enable interrupts
Exchange the location (SP) with register ss
Exchange the contents of AF and A’F’
Exchange the contents of DE and HL
Exchange the contents of BC, DE and HL with the contents
of B’C, D’E’ and H’L’, respectively
54
50
49
49
50
HALT
Halt (wait for interrupt or reset)
54
IM 0
IM 1
IM 2
IN A,(n)
IN r,(C)
INC m
1
INC r
INC rr
IND
INDR
INI
INIR
Set interrupt mode 0
Set interrupt mode 1
Set interrupt mode 2
Load Accumulator with input from device (n)
Load register r with input from device (C)
Increment data in memory location m
1
Increment register r
Increment contents of register pair rr
Load location (HL) with input from port (C), decrement HL and B
Load location (HL) with input from port (C), decrement HL and B; repeat until B
e
0
Load location (HL) with input from port (C), increment HL, decrement B
Load location (HL) with input from port (C), increment HL, decrement B;
repeat until B
e
0
54
55
55
52
52
42
37
43
52
54
52
53
JP cc,nn
JP nn
JP (ss)
JR d
JR kk,d
Jump to location nn, if condition cc is true
Unconditional jump to location nn
Unconditional jump to location (ss)
Unconditional jump relative to PC
a
d
Jump relative to PC
a
d, if kk true
55
55
55
55
55
LD A,I
LD A,m
2
LD A,R
LD I,A
LD m
1
,n
LD m
1
,r
LD m
2
,A
LD (nn),rr
LD r,m
1
LD r,n
LD R,A
LD r
d
,r
s
LD rr,(nn)
LD rr,nn
LD SP,ss
LDD
LDDR
LDI
LDIR
Load Accumulator with register I contents
Load Accumulator from location m
2
Load Accumulator with register R contents
Load register I with Accumulator contents
Load memory with immediate data n
Load memory from register r
Load memory from Accumulator
Load memory location nn with register pair rr
Load register r from memory
Load register with immediate data n
Load register R from Accumulator
Load destination register r
d
from source register r
s
Load register pair rr from memory location nn
Load register pair rr with immediate data nn
Load SP from register pair ss
Load location (DE) with location (HL), decrement DE, HL and BC
Load location (DE) with location (HL), decrement DE, HL and BC; repeat until BC
e
0
Load location (DE) with location (HL), increment DE and HL, decrement BC
Load location (DE) with location (HL), increment DE and HL, decrement BC;
repeat until BC
e
0
32
33
32
32
33
32
33
34
33
32
32
32
35
34
34
50
51
50
51
NEG
NOP
Negate Accumulator (2’s complement)
No operation
38
54
29
相關(guān)PDF資料
PDF描述
NSC800V NSC800TM High-Performance Low-Power CMOS Microprocessor
NSC858 NSC858 Universal Asynchronous Receiver/Transmitter
NSC858D NSC858 Universal Asynchronous Receiver/Transmitter
NSC858E NSC858 Universal Asynchronous Receiver/Transmitter
NSC858N NSC858 Universal Asynchronous Receiver/Transmitter
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
NSC800N/A+ 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:8-Bit Microprocessor
NSC800N/B+ 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:8-Bit Microprocessor
NSC800N-1 制造商:Texas Instruments 功能描述:
NSC800N-1/A+ 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:8-Bit Microprocessor
NSC800N-1/B+ 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:8-Bit Microprocessor
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠(chǎng)商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*