參數(shù)資料
型號: NSAM265SRA
廠商: National Semiconductor Corporation
英文描述: CompactSPEECH Digital Speech Processors
中文描述: CompactSPEECH數(shù)字語音處理器
文件頁數(shù): 16/58頁
文件大?。?/td> 712K
代理商: NSAM265SRA
2.0 Functional Description
(Continued)
2.8 FLASH/AFLASH ACCESS (NSAM265SF)
The NSAM265SF CompactSPEECH supports off-chip mem-
ory devices through Expansion Memory. Up to 64 Kbytes
(64K
c
8) of Expansion Memory are supported directly.
Nevertheless, the CompactSPEECH uses bits of the on-
chip I/O port (PB) to further extend the 64 Kbytes address
space, and with additional glue logic it can access up to 2
Mbytes address space.
The Expansion Memory mechanism is used to connect the
NSAM265SF CompactSPEECH to AFLASH and IVS ROM
devices.
ROM is connected to the CompactSPEECH using the data
bus, D(0:7), the address bus, A(0:15), the extended address
signals, EA(16:21), (EA21 serves as the ROM Output En-
able signal, ROMDOE), and Expansion Memory Chip Se-
lect, EMCS controls. If AFLASH is connected (NSAM265SF
only), the FLASHDOE signal is also used. The number of
extended address pins to use may vary, depending on the
size and configuration of the ROM and AFLASH devices.
Reading from Expansion Memory
An Expansion Memory read bus cycle starts at T1, when the
data bus is in TRI-STATE, and the address is driven on the
address bus. EMCS is asserted (0) on a T2W1 cycle. This
cycle is followed by three T2W cycles and one T2 cycle.
Data is sampled by the NSAM265SF at the end of the T2
cycle.
The transaction is terminated at T3, when EMCS becomes
inactive (1). The address remains valid until T3 is complete.
A T3H cycle is added after the T3 cycle. The address re-
mains valid until the end of T3H.
WR0 is inactive (1) during the read bus cycle.
2.9 FLASH/AFLASH SPECIFICATIONS
The NSAM265SF supports either the AMD Am29F040 Sec-
tor Erase Audio Flash 4-Mbit Memory or the Intel 28F008SA
8-Mbit AFLASH memory as message storage devices.
These devices are organized in 64-Kbytes blocks and sup-
port up to 100,000 block-erase cycles. For the exact fea-
tures of these devices please refer to the devices’ specifica-
tions.
AFLASH devices contain bad blocks. The NSAM265SF
supports devices with more good blocks than bad blocks
i.e., at least five good blocks on the AMD device, and at
least nine good blocks on the Intel device.
2.10 FLASH/AFLASH CONFIGURATIONS
The NSAM265SF supports up to two 28F008SA devices, or
up to four 29F040 devices. The actual configuration is se-
lected by the CFG command.
Figures 2-6, 2-7, 2-8 and 2-9 illustrate the minimum and
maximum configurations for each device in an environment
that contains an IVS ROM.
TL/EE/12378–9
FIGURE 2-6. One Intel Flash Device: No External Glue Logic
16
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