參數(shù)資料
型號: NS32FX16-25
廠商: National Semiconductor Corporation
英文描述: Imaging/Signal Processor
中文描述: 影像/信號處理器
文件頁數(shù): 61/88頁
文件大小: 902K
代理商: NS32FX16-25
4.0 Device Specifications
(Continued)
4.4.2 Timing Tables
4.4.2.1 Output Signals: Internal Propagation Delays, NS32FX16-15, NS32FX16-20, NS32FX16-25
#
The output to input timings (e.g., address to data-in) are at least 2 ns better than the worst case values calculated from the
output valid and input setup times relative to CTTL.
Symbol Figure
Description
Reference/
Conditions
NS32FX16-15
NS32FX16-20
NS32FX16-25
Units
Min
Max
Min
Max
Min
Max
t
CTp
4-15
CTTL Clock Period
R.E., CTTL to Next
R.E., CTTL
66
1000
50
1000
40
1000
ns
t
CTh
4-15
CTTL High Time
At 2.0V (Both Edges)
0.5 t
b
6 ns
0.5 t
CTp
b
6 ns
0.5 t
b
5 ns
0.5 t
CTp
b
5 ns
0.5 t
b
5 ns
0.5 t
CTp
b
4 ns
t
CTI
4-15
CTTL Low Time
At 0.8V (Both Edges)
t
CTr
4-15
CTTL Rise Time
0.8V to 2.0V
on R.E., CTTL
6
5
4
ns
t
CTf
4-15
CTTL Fall Time
2.0V to 0.8V
on F.E., CTTL
6
5
4
ns
t
XCTd
4-15
OSCIN to CTTL Delay
4.2V on R.E.,
OSCIN to R.E., CTTL
35
29
25
ns
t
XFr
4-15
OSCIN to FCLK
R.E. Delay
4.2V on R.E., OSCIN
to R.E., FCLK
25
20
15
ns
t
FCr
4-15
FCLK to CTTL
R.E. Delay
R.E., FCLK to R.E., CTTL
10
10
10
ns
t
FCf
4-15
FCLK to CTTL
F.E. Delay
R.E., FCLK to F.E., CTTL
10
10
10
ns
t
ALv
4-4
AD0–AD15 Valid
(Note 5)
After R.E., CTTL T1
14
13
12
ns
t
ALh
t
AHv
4-4
AD0–AD15 Hold
After R.E., CTTL T2
0
0
0
ns
4-4
A16–A23 Valid
(Note 5)
After R.E., CTTL T1
14
13
12
ns
t
AHh
4-4
A16–A23 Hold
After R.E., CTTL
Next T1 or Ti
0
0
0
ns
t
ALfr
4-4
AD0–AD15 Floating
(during Read)
After R.E., CTTL T2
14
13
12
ns
t
ALf
t
AHf
t
Dv
4-7
AD0–AD15 Floating
After R.E., CTTL Ti
14
13
12
ns
4-7
A16–A23 Floating
After R.E., CTTL Ti
14
13
12
ns
4-5
Data Valid (Write Cycle) After R.E., CTTL
14
13
12
ns
T2 or T1
t
Dh
4-5
Data Hold
After R.E., CTTL
Next T1 or Ti
0
0
0
ns
t
ADSa
t
ADSia
4-4
ADS Signal Active
After R.E., CTTL T1
14
13
12
ns
4-4
ADS Signal Inactive
(Note 4)
After R.E., CTTL T1
0.5 t
CTp
0.5 t
CTp
0.5 t
CTp
0.5 t
CTp
0.5 t
CTp
0.5 t
CTp
b
6 ns
a
16 ns
b
6 ns
20
15
a
15 ns
b
6 ns
10
a
14 ns
t
ADSw
t
ADSf
t
ALADSs
t
HBEv
t
HBEh
4-5
ADS Pulse Width
At 0.8V (Both Edges)
ns
4-7
ADS Floating
After R.E., CTTL Ti
14
13
12
ns
4-4
AD0–AD15 Setup
Before ADS T.E.
10
10
10
ns
4-4
HBE Signal Valid
After R.E., CTTL T1
14
13
12
ns
4-4
HBE Signal Hold
After R.E., CTTL
Next T1 or Ti
0
0
0
ns
t
HBEf
4-7
HBE Signal Floating
After R.E., CTTL Ti
14
13
12
ns
61
相關(guān)PDF資料
PDF描述
NS32FX164-20 Advanced Imaging/Communication Signal Processors(高級圖象/通訊信號處理器)
NS32FV16-25 Advanced Imaging/Communication Signal Processors
NS32FX164-25 Advanced Imaging/Communication Signal Processors(高級圖象/通訊信號處理器)
NS32FX161-15 Advanced Imaging/Communication Signal Processors(高級圖象/通訊信號處理器)
NS32FX161-20 Advanced Imaging/Communication Signal Processors(高級圖象/通訊信號處理器)
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