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| 型號： | NS32FX16-25 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Imaging/Signal Processor |
| 中文描述： | 影像/信號處理器 |
| 文件頁數(shù)： | 30/88頁 |
| 文件大?。?/td> | 902K |
| 代理商： | NS32FX16-25 |
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3.0 Functional Description
(Continued)
3.2.2 Returning from an Exception Service Procedure
To return control to an interrupted program, one of two in-
structions can be used: RETT (Return from Trap) and RETI
(Return from Interrupt).
RETT is used to return from any trap or a non-maskable
interrupt service procedure. Since some traps are often
used deliberately as a call mechanism for supervisor mode
procedures, RETT can also adjust the Stack Pointer (SP) to
discard a specified number of bytes from the original stack
as surplus parameter space.
RETI is used to return from a maskable interrupt service
procedure. A difference of RETT, RETI also informs any
external interrupt control units that interrupt service has
completed. Since interrupts are generally asynchronous ex-
ternal events, RETI does not discard parameters from the
stack.
Both of the above instructions always restore the PSR,
MOD, PC and SB registers to their previous contents.
3.2.3 Maskable Interrupts
The INT pin is a level-sensitive input. A continuous low level
is allowed for generating multiple interrupt requests. The in-
put is maskable, and is therefore enabled to generate inter-
rupt requests only while the Processor Status Register I bit
is set. The I bit is automatically cleared during service of an
INT or NMI request, and is restored to its original setting
upon return from the interrupt service routine via the RETT
or RETI instruction.
The INT pin may be configured via the SETCFG instruction
as either Non-Vectored (CFG Register bit I
e
0) or Vectored
(bit I
e
1).
3.2.3.1 Non-Vectored Mode
In the Non-Vectored mode, an interrupt request on the INT
pin will cause an Interrupt Acknowledge bus cycle, but the
CPU will ignore any value read from the bus and use instead
a default vector of zero. This mode is useful for small sys-
tems in which hardware interrupt prioritization is unneces-
sary.
TL/EE/10818–15
FIGURE 3-6. Return from Trap (RETT n) Instruction Flow
30
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| NS32FX164-20 | Advanced Imaging/Communication Signal Processors(高級圖象/通訊信號處理器) |
| NS32FV16-25 | Advanced Imaging/Communication Signal Processors |
| NS32FX164-25 | Advanced Imaging/Communication Signal Processors(高級圖象/通訊信號處理器) |
| NS32FX161-15 | Advanced Imaging/Communication Signal Processors(高級圖象/通訊信號處理器) |
| NS32FX161-20 | Advanced Imaging/Communication Signal Processors(高級圖象/通訊信號處理器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| NS32FX164 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| NS32FX164-20 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Advanced Imaging/Communication Signal Processors |
| NS32FX164-25 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Advanced Imaging/Communication Signal Processors |
| NS32FX164AV-25 | 功能描述:IC IMAGING COMM SGNL PROC PLCC68 RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:- 標(biāo)準(zhǔn)包裝:2 系列:MPC8xx 處理器類型:32-位 MPC8xx PowerQUICC 特點:- 速度:133MHz 電壓:3.3V 安裝類型:表面貼裝 封裝/外殼:357-BBGA 供應(yīng)商設(shè)備封裝:357-PBGA（25x25） 包裝:托盤 |
| NS32FX164V-15 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Advanced Imaging/Communication Signal Processors |
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