參數(shù)資料
型號(hào): NAND04GA3C2AN1E
廠商: 意法半導(dǎo)體
英文描述: 4Gbit, 2112 Byte Page, 3V, Multi-level NAND Flash Memory
中文描述: 4Gbit的,2112字節(jié)的頁,3V供電,多級(jí)NAND閃存
文件頁數(shù): 38/51頁
文件大?。?/td> 374K
代理商: NAND04GA3C2AN1E
12 DC and AC parameters
NAND04GA3C2A, NAND04GW3C2A
38/51
AC Characteristics for Operations, V
DDQ
3V Devices
(1)
Alt.
Symbol
Table 20.
Symbol
Parameter
3V I/O
Unit
t
ALLRL1
t
AR
Address Latch Low to
Read Enable Low
Read Electronic Signature
Min
20
ns
t
ALLRL2
Read cycle
Min
20
ns
t
BHRL
t
RR
Ready/Busy High to Read Enable Low
Min
20
ns
t
BLBH1
Ready/Busy Low to
Ready/Busy High
Read Busy time
Max
60
μs
t
BLBH2
t
PROG
Program Busy time
Max
2000
μs
t
BLBH3
t
BERS
Erase Busy time
Max
3
ms
t
BLBH4
Reset Busy time, during ready
Max
5
μs
t
WHBH1
t
RST
Write Enable High to
Ready/Busy High
Reset Busy time, during read
Max
20
μs
Reset Busy time, during program
Max
40
μs
Reset Busy time, during erase
Max
200
μs
t
CLLRL
t
CLR
Command Latch Low to Read Enable Low
Min
15
ns
t
DZRL
t
IR
Data Hi-Z to Read Enable Low
Min
0
ns
t
EHQZ
t
CHZ
Chip Enable High to Output Hi-Z
Max
30
ns
t
ELQV
t
CEA
Chip Enable Low to Output Valid
Max
50
ns
t
RHRL
t
REH
Read Enable High to
Read Enable Low
Read Enable High Hold time
Min
20
ns
t
RHQZ
t
RHZ
Read Enable High to Output Hi-Z
Max
30
ns
t
RLRH
t
RP
Read Enable Low to
Read Enable High
Read Enable Pulse Width
Min
40
ns
t
RLRL
t
RC
Read Enable Low to
Read Enable Low
Read Cycle time
Min
60
ns
t
RLQV
t
REA
Read Enable Low to
Output Valid
Read Enable Access time
Max
45
ns
Read ES Access time
(2)
t
WHBH
t
R
Write Enable High to
Ready/Busy High
Read Busy time
Max
60
μs
t
WHBL
t
WB
Write Enable High to Ready/Busy Low
Max
100
ns
t
WHRL
t
VHWH(3)
t
VLWH(3)
t
WHR
Write Enable High to Read Enable Low
Min
80
ns
t
WW
Write Protection time
Min
100
ns
Min
100
ns
1.
AC Characteristics for V
DDQ
1.8V devices are still to be determined.
ES = Electronic Signature.
2.
3.
WP High to W High during Program/Erase Enable operations.
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