參數(shù)資料
型號: NAND01GR4B2BZA1F
廠商: STMICROELECTRONICS
元件分類: PROM
英文描述: 64M X 16 FLASH 1.8V PROM, 25000 ns, PBGA63
封裝: 9 X 11 MM, 1 MM HEIGHT, 0.80 MM PITCH, LEAD FREE, VFBGA-63
文件頁數(shù): 53/63頁
文件大?。?/td> 684K
代理商: NAND01GR4B2BZA1F
NAND01G-B2B, NAND02G-B2C
DC And AC parameters
57/63
Figure 33.
Resistor Value Versus Waveform Timings For Ready/Busy Signal
1.
T = 25°C.
11.2
Data Protection
The ST NAND device is designed to guarantee Data Protection during Power Transitions.
A VDD detection circuit disables all NAND operations, if VDD is below the VLKO threshold.
In the VDD range from VLKO to the lower limit of nominal range, the WP pin should be kept
low (VIL) to guarantee hardware protection during power transitions as shown in the below
figure.
Figure 34.
Data Protection
ai07565B
RP (K)
12
3
4
100
300
200
t r
,t
f
(ns)
1
2
3
1.7
0.85
30
1.7
tr
tf
ibusy
0
400
4
RP (K)
12
3
4
100
300
200
1
2
3
ibusy
(mA)
2.4
1.2
0.8
0.6
100
200
300
400
3.6
0
400
4
VDD = 1.8V, CL = 30pF
VDD = 3.3V, CL = 100pF
t r
,t
f
(ns)
ibusy
(mA)
60
90
120
0.57
0.43
Ai11086
VLKO
VDD
W
Nominal Range
Locked
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