參數(shù)資料
型號： MX98905BFC
廠商： Electronic Theatre Controls, Inc.
英文描述： The MX98905 is designed for easy implementation of CSMA/CD local area networks,
中文描述： 該MX98905是專為易于實現(xiàn)的多址/光盤局域網(wǎng)，
文件頁數(shù)： 72/86頁
文件大?。?/td> 352K
代理商： MX98905BFC
72
P/N: PM0365
REV. 1.3, NOV 20 ,1995
MX98905B
16. DMA REGISTER
(Continued)
FIFO
This is an 8-bit register which allows the CPU to examine
the contents of the FIFO after loopback. The FIFO will
contain the last 8 data bytes transmitted in the loopback
packet. Sequential reads from the FIFO will advance a
pointer in the FIFO automatically and reading of all 8
bytes.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
FIFO
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
Note:
The FIFO should only be read when the ENC has been
programmed in the loopback mode.
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