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參數(shù)資料
| 型號(hào)： | MX98905BFC |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | The MX98905 is designed for easy implementation of CSMA/CD local area networks, |
| 中文描述： | 該MX98905是專為易于實(shí)現(xiàn)的多址/光盤局域網(wǎng)， |
| 文件頁(yè)數(shù)： | 57/86頁(yè) |
| 文件大?。?/td> | 352K |
| 代理商： | MX98905BFC |
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57
P/N: PM0365
REV. 1.3, NOV 20 ,1995
MX98905B
11 TRANSMIT CONFIGURATION REGISTER (TCR) 0DH (WRITE)
(Continued)
SYMBOL
BIT
DESCRIPTION
OFST
D4
COLLISION OFFSET ENABLE
: This bit modifies the backoff algorithm to allow
prioritization of modes.
0: Normal Backoff algorithm
1: Forces Backoff algorithm modification to 0 to 2 min (3+n, 10) slot times for first
three collisions, then follows standard backoff.( For first three collisions station
has higher average backoff delay making a low-priority mode.)
RESERVED
D5
Reserved
RESERVED
D6
Reserved
RESERVED
D7
Reserved
12. TRANSMIT STATUS REGISTER (TSR) 04H
(READ)
Each particular bit of this register is set when the corre-
sponding event occurs on the media during transmission
of a packet. The contents of this register are not specified
until after the first transmission and are cleared upon the
start of the next transmission initiated by the host. A read
of this register is necessary after each transmission.
RTX
COL
ABT
CRS
FU
CDH
OWC
1
x
2
3
4
5
6
7
Bits
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