參數(shù)資料
型號(hào): MX28F640C3BTC-12
廠商: MACRONIX INTERNATIONAL CO LTD
元件分類: DRAM
英文描述: 64M-BIT [4M x16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY
中文描述: 4M X 16 FLASH 3V PROM, 120 ns, PDSO48
封裝: 12 X 20 MM, MO-142, TSOP1-48
文件頁(yè)數(shù): 31/44頁(yè)
文件大?。?/td> 653K
代理商: MX28F640C3BTC-12
31
P/N:PM0900
MX28F640C3T/B
REV. 0.6, AUG. 20, 2003
Figure 6. Automated Word Programming Flowchart
Bus
Operation
Write
Command
Comments
Program
Setup
Program
Data=40H
Write
Data=Data to Program
Addr=Location to Program
Status Register Data Toggle
CE or OE to Update Status
Register Data
Check SR.7
1=WSM Ready
0=WSM Busy
Read
Standby
Repeat for subsequent programming operations.
SR full status check can be done after each program
or after a sequence of program operations.
Write FFH after the last program operation to reset
device to read array mode.
Bus
Operation
Standby
Command
Comments
Check SR.3
1=VPP Low Detect
Check SR.4
1=VPP Program Detect
Check SR.11
1=Attempted Program to
Locked Sector-Program
Aborted
Standby
Standby
SR.3 MUST be cleared, if set during a program at-
tempt, before further attempts are allowed by the Write
State Machine.
SR.4, SR.3, and SR.1 are only cleared by the Clear
Status Register Command, in cases where multiple
programmed before full status is checked.
If an error is detected, clear the status register before
attempting retry or other error recovery.
Start
Write 40H
Full Status
Check if Desired
Read Status Register
Program Address/Data
No
Yes
SR.7=1
Program Ccomplete
Read Status Register
Data(See Above)
FULL STATUS CHECK PROCEDURE
Program Successful
SR.3=
0
0
0
VPP Range Error
1
Programming Error
1
Attempted Program to
Locked Block- Aborted
1
SR.4=
SR.1=
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