參數(shù)資料
型號: MX28F640C3BTC-12
廠商: MACRONIX INTERNATIONAL CO LTD
元件分類: DRAM
英文描述: 64M-BIT [4M x16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY
中文描述: 4M X 16 FLASH 3V PROM, 120 ns, PDSO48
封裝: 12 X 20 MM, MO-142, TSOP1-48
文件頁數(shù): 26/44頁
文件大?。?/td> 653K
代理商: MX28F640C3BTC-12
26
P/N:PM0900
MX28F640C3T/B
REV. 0.6, AUG. 20, 2003
Figure 4. PROGRAM AND ERASE OPERATION AC WAVEFORM
Notes:
1. CE must be toggled low when reading Status Register Data. WE must be inactive (high) when reading Status
Register Data.
A. VCC Power-Up and Standby.
B. Write Program or Erase Setup Command.
C. Write Valid Address and Data (for Program) or Erase Confirm Command.
D. Automated Program or Erase Delay.
E. Read Status Register Data (SRD): reflects completed program/erase operation.
F. Write Read Array Command.
tVPWH
(tVPEH)
tQVVL
tWHWL
(tEHEL)
tWHGL
tPHWL
(tPHEL)
(Note 1)
(Note 1)
tELEH
(tWLWH)
tWHDX
(tEHDX)
tWHEH
(tEHWH)
tELWL
(tWLEL)
tAVWH
(tAVEH)
tWHAX
(tEHAX)
tDVWH
(tEVEH)
tBHWH
(tBHEH)
tQVBL
High Z
DIN
Address (A)
A
B
C
D
E
F
VIH
VIL
OE(G)
VIH
VIL
VIH
VIL
CE(WE)[E(W)]
VIH
Disable
EnableVIL
WE,(CE)[W(E)]
VIH
VIL
DATA[Q]
VOH
VOL
RESET[P]
VIH
VIL
VPPH1
VPPLK
VIL
WP
VPP[V]
DIN
AIN
AIN
DIN
Valid
SRD
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