參數(shù)資料
型號: MVTX2604
廠商: Zarlink Semiconductor Inc.
英文描述: Managed 24-Port 10/100 Mb + 2 Port 1 Gb Ethernet Switch
中文描述: 管理24端口的10/100 Mb 2端口千兆以太網(wǎng)交換機1
文件頁數(shù): 107/173頁
文件大?。?/td> 2097K
代理商: MVTX2604
MVTX2604
Data Sheet
109
Zarlink Semiconductor Inc.
RLOW and RHIGH form a range for logical ports to be classified with priority specified in RPRIORITY.
14.10.41 CPUQOSC123
CPU Address: 5a0, 5a1, 5a2
Accessed by CPU and serial interface (R/W)
C - CPUQOSC1 – CPU BYTE_C1 I
2
C Address h0C1, CPU Address 517)
B - CPUQOSC2 – CPU BYTE_C2 I
2
C Address h0C2, CPU Address 518)
A - CPUQOSC3 – CPU BYTE_C3 I
2
C Address h0C3, CPU Address 519)
Represents values A-C for a CPU port. The values A-C are per-queue byte thresholds for random early drop.
QOSC3 represents A, and QOSC1 represents C. Granularity: 256 bytes
14.11 Group 6 Address MISC Group
14.11.1 MII_OP0 – MII Register Option 0
I
2
C Address F0, CPU Address:h600
Accessed by CPU, serial interface and I
2
C (R/W)
Bit[3:1]
Transmit Priority
Bits[0]:
Drop Priority
7
6
5
4
0
hfc
1prst
DisJ
Vendor Spc. Reg Addr
Bits [7]:
Half duplex flow control feature
0 = Half duplex flow control always enable
1 = Half duplex flow control by negotiation
Bits [6]:
Link partner reset auto-negotiate disable
Bits [5]:
Disable jabber detection. This is for HomePNA applications or any serial
operation slower than 10 Mbps.
0 = Enable
1 = Disable
Bit [4:0]:
Vendor specified link status register address (null value means don’t use it)
(Default 00). This is used if the Linkup bit position in the PHY is non-
standard.
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參數(shù)描述
MVTX2604A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MVTX260x Physical Port Control
MVTX2604AG 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Managed 24-Port 10/100 Mb + 2 Port 1 Gb Ethernet Switch
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