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參數(shù)資料
| 型號： | MT9196AE1 |
| 廠商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類： | 通信及網(wǎng)絡 |
| 英文描述： | Integrated Digital Phone Circuit (IDPC) |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PDIP28 |
| 封裝： | 0.600 INCH, LEAD FREE, PLASTIC, MS-011AB, DIP-28 |
| 文件頁數(shù)： | 17/46頁 |
| 文件大小： | 631K |
| 代理商： | MT9196AE1 |
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MT9196
Data Sheet
17
Zarlink Semiconductor Inc.
Table 3
For synchronous operation data is sampled, from Din, on the falling edge of the bit clock during the time slot defined
by the STB input. Data is made available, on Dout, on the rising edge of the bit clock during the time slot defined by
the STB input. Dout is tri-stated at all times when STB is not true. If STB is valid but no transmit path has been
selected (via the Transmit Path Control Register) then quiet code will be transmitted on Dout during the valid strobe
period. There is no frame delay through the FDI circuit for synchronous operation.
For asynchronous operation Dout and Din are as defined for synchronous operation except that data is transferred
according to the internally generated bit clock. Due to resynchronization circuitry activity, the output jitter on Dout is
nominally larger but will not affect operation since the bit cell period at 128 kb/s and 256 kb/s is relatively large.
There is a one frame delay through the FDI circuit for asynchronous operation. Refer to the specifications of
Figures 13 and 14 for both synchronous and asynchronous SSI timing.
Path Selection
Transmit and receive audio paths are independently programmed through their respective Path Control Registers
at addresses 12h and 13h. Individual audio path circuit blocks are powered up only as they are required to satisfy
the programmed values in the path control registers. More detail is provided in the Power-up/down Reset section.
Transmit
Transmit audio path configuration (Path Control Register, address 12h) is simply a matter of assigning one of the
three analog signal inputs, or the digital tone generator, to the required transmit B- Channel. Intermediate functions
such as the transmit filter, encoder and transmit gain are automatically powered up and assigned as required. If
transmit tones is selected then the digital tone generator must be programmed and enabled properly as described
in the Digital Tone Generator section. Note that transmit tones may be enabled independently of the receive path.
For ST-BUS mode the configuration of bits 0 to 3, at address 12h, defines both the source of transmit audio and the
B-Channel destination. The configuration of this register permits selection of only one transmit B-Channel at a time.
For SSI mode only the selections where bit 3 = 0 are allowed. This is because the B-Channel timeslot is defined by
the input strobe at STB. If a selection where bit 3 = 1 is made it will be treated the same as the condition where B3
- B0 = all zero's.
All reserved configurations should not be used.
Receive
The receive path assignment (Receive Path Control Register, address 13h) is different from the transmit path
assignment. In this case a particular analog output port is assigned a source for its audio signal. The receive filter
audio path and the Auxiliary In analog port are the available choices. This configuration allows flexibility in
assignment. Two examples; the receive filter path can be assigned to the handset receiver, for a standard handset
conversation, while permitting the loudspeaker to announce a message originating from the Auxiliary In port. Or
Asynch/
Synch
CSL1
CSL0
Bit Clock
Rate (kHz)
CLOCKin
(kHz)
1
0
0
128
4096
mandatory
4096
mandatory
512
1536
2048
4096
1
0
1
256
0
0
0
0
0
0
1
1
0
1
0
1
512
1536
2048
4096
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相關代理商/技術參數(shù) |
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| MT9196AP | 制造商:Microsemi Corporation 功能描述: |
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| MT9196APR | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Integrated Digital Phone Circuit (IDPC) |
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| MT9196AS | 制造商:Microsemi Corporation 功能描述: |
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