參數(shù)資料
型號(hào)： MT48V4M32LFFC
廠商： Micron Technology, Inc.
英文描述： SYNCHRONOUS DRAM
中文描述： 同步DRAM
文件頁(yè)數(shù)： 17/61頁(yè)
文件大?。?/td> 1400K
代理商： MT48V4M32LFFC
17
128Mb: x16, x32 Mobile SDRAM
MobileY95W_3V_F.p65 – Rev. F; Pub. 9/02
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2002, Micron Technology, Inc.
128Mb: x16, x32
MOBILE SDRAM
ADVANCE
Operation
BANK/ROW ACTIVATION
Before any READ or WRITE commands can be issued
to a bank within the SDRAM, a row in that bank must be
“opened.” This is accomplished via the ACTIVE com-
mand, which selects both the bank and the row to be
activated (see Figure 3).
After opening a row (issuing an ACTIVE command), a
READ or WRITE command may be issued to that row,
subject to the
t
RCD specification.
t
RCD (MIN) should be
divided by the clock period and rounded up to the next
whole number to determine the earliest clock edge after
the ACTIVE command on which a READ or WRITE com-
mand can be entered. For example, a
t
RCD specification
of 20ns with a 125 MHz clock (8ns period) results in 2.5
clocks, rounded to 3. This is reflected in Figure 4, which
covers any case where 2 <
t
RCD (MIN)/
t
CK
≤
3. (The same
procedure is used to convert other specification limits
from time units to clock cycles.)
A subsequent ACTIVE command to a different row in
the same bank can only be issued after the previous
active row has been “closed” (precharged). The mini-
mum time interval between successive ACTIVE com-
mands to the same bank is defined by
t
RC.
A subsequent ACTIVE command to another bank can
be issued while the first bank is being accessed, which
results in a reduction of total row-access overhead. The
minimum time interval between successive ACTIVE com-
mands to different banks is defined by
t
RRD.
Figure 4
Example: Meeting
t
RCD (MIN) When 2 <
t
RCD (MIN)/
t
CK
≤
3
CLK
T2
T1
T3
T0
t
COMMAND
NOP
ACTIVE
READ or
WRITE
T4
NOP
RCD
DON’T CARE
CS#
WE#
CAS#
RAS#
CKE
CLK
A0–A10, A11
AROW
HIGH
BA0, BA1
ABANK
Figure 3
Activating a Specific Row in a
Specific Bank
相關(guān)PDF資料
PDF描述
MT49H16M16 THERMISTOR PTC 100OHM 110DEG RAD
MT49H16M16FM REDUCED LATENCY DRAM RLDRAM
MT49H8M32 THERMISTOR PTC 100OHM 120DEG RAD
MT49H8M32FM REDUCED LATENCY DRAM RLDRAM
MT4C1M16E5DJ-6 EDO DRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*