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參數(shù)資料
| 型號： | MT48V4M32LFFC |
| 廠商： | Micron Technology, Inc. |
| 英文描述： | SYNCHRONOUS DRAM |
| 中文描述： | 同步DRAM |
| 文件頁數(shù)： | 13/61頁 |
| 文件大?。?/td> | 1400K |
| 代理商： | MT48V4M32LFFC |
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13
128Mb: x16, x32 Mobile SDRAM
MobileY95W_3V_F.p65 – Rev. F; Pub. 9/02
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2002, Micron Technology, Inc.
128Mb: x16, x32
MOBILE SDRAM
ADVANCE
Thus, during ambient temperatures, the power
consumed during refresh was unnecessarily high,
because the refresh rate was set to accommodate the
higher temperatures. Setting M4 and M3, allow the
DRAM to accomodate more specific temperature
regions during SELF REFRESH. There are four
temperature settings, which will vary the SELF
REFRESH current according to the selected tempera-
ture. This selectable refresh rate will save power when
the DRAM is operating at normal temperatures.
PARTIAL ARRAY SELF REFRESH
For further power savings during SELF REFRESH, the
Partial Array Self Refresh (PASR) feature allows the con-
troller to select the amount of memory that will be re-
freshed during SELF REFRESH. The refresh options are
all banks (banks 0, 1, 2, and 3); two banks(banks 0 and 1);
and one bank (bank 0). WRITE and READ commands
occur to any bank selected during standard operation,
but only the selected banks in PASR will be refreshed
during SELF REFRESH. It’s important to note that data
in banks 2 and 3 will be lost when the two bank option is
used. Data will be lost in banks 1, 2, and 3 when the one
bank option is used.
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