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參數(shù)資料
| 型號： | MT47H128M8HQ-3AT |
| 元件分類： | DRAM |
| 英文描述： | 128M X 8 DDR DRAM, 0.4 ns, PBGA60 |
| 封裝： | 8 X 11.50 MM, ROHS COMPLIANT, FBGA-60 |
| 文件頁數(shù)： | 39/129頁 |
| 文件大?。?/td> | 9252K |
| 代理商： | MT47H128M8HQ-3AT |
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Table 3: FBGA 84-Ball – x16 and 60-Ball – x4, x8 Descriptions (Continued)
Symbol
Type
Description
DQS, DQS#
I/O
Data strobe: Output with read data, input with write data for source synchronous oper-
ation. Edge-aligned with read data, center-aligned with write data. DQS# is only used
when differential data strobe mode is enabled via the LOAD MODE command.
LDQS, LDQS#
I/O
Data strobe for lower byte: Output with read data, input with write data for source
synchronous operation. Edge-aligned with read data, center-aligned with write data.
LDQS# is only used when differential data strobe mode is enabled via the LOAD MODE
command.
UDQS, UDQS#
I/O
Data strobe for upper byte: Output with read data, input with write data for source
synchronous operation. Edge-aligned with read data, center-aligned with write data.
UDQS# is only used when differential data strobe mode is enabled via the LOAD MODE
command.
RDQS, RDQS#
Output
Redundant data strobe: For x8 only. RDQS is enabled/disabled via the LOAD MODE com-
mand to the extended mode register (EMR). When RDQS is enabled, RDQS is output with
read data only and is ignored during write data. When RDQS is disabled, ball B3 becomes
data mask (see DM ball). RDQS# is only used when RDQS is enabled and differential data
strobe mode is enabled.
VDD
Supply
Power supply: 1.55V, –0.05V, +0.35V
VDDQ
Supply
DQ power supply: 1.55V, –0.05V, +0.35V. Isolated on the device for improved noise im-
munity.
VDDL
Supply
DLL power supply: 1.55V, –0.05V, +0.35V
VREF
Supply
SSTL_18 reference voltage (VDDQ/2).
VSS
Supply
Ground.
VSSDL
Supply
DLL ground: Isolated on the device from VSS and VSSQ.
VSSQ
Supply
DQ ground: Isolated on the device for improved noise immunity.
NC
–
No connect: These balls should be left unconnected.
NF
–
No function: x8: these balls are used as DQ4–DQ7; x4: they are no function.
NU
–
Not used: For x16 only. If EMR(E10) = 0, A8 and E8 are UDQS# and LDQS#. If EMR(E10) =
1, then A8 and E8 are not used.
NU
–
Not used: For x8 only. If EMR(E10) = 0, A2 and E8 are RDQS# and DQS#. If EMR(E10) = 1,
then A2 and E8 are not used.
RFU
–
Reserved for future use: Row address bits A13 (x16 only), A14, and A15.
1Gb: x4, x8, x16 1.55V DDR2 SDRAM
Ball Assignments and Descriptions
PDF: 09005aef82b91d01
1GbDDR2_1_55V.PDF Rev. A 5/09 EN
17
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2009 Micron Technology, Inc. All rights reserved.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT47H128M8HQ-3EAT | 制造商:MICRON 制造商全稱:Micron Technology 功能描述:DDR2 SDRAM |
| MT47H128M8HQ-3EIT | 制造商:MICRON 制造商全稱:Micron Technology 功能描述:DDR2 SDRAM |
| MT47H128M8HQ-3EL | 制造商:MICRON 制造商全稱:Micron Technology 功能描述:DDR2 SDRAM |
| MT47H128M8HQ-3IT | 制造商:MICRON 制造商全稱:Micron Technology 功能描述:DDR2 SDRAM |
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