參數(shù)資料
型號(hào)： MT46V32M8BG-6AT:G
元件分類： DRAM
英文描述： 32M X 8 DDR DRAM, 0.7 ns, PBGA60
封裝： (8 X 14) MM, LEAD FREE,PLASTIC, FBGA-60
文件頁(yè)數(shù)： 35/93頁(yè)
文件大?。?/td> 3632K
PDF: 09005aef80768abb/Source: 09005aef82a95a3a
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DDR_x4x8x16_Core2.fm - 256Mb DDR: Rev. O, Core DDR: Rev. B 1/09 EN
38
2003 Micron Technology, Inc. All rights reserved.
256Mb: x4, x8, x16 DDR SDRAM
Electrical Specifications – DC and AC
38c. The full driver pull-up current variation from MIN to MAX process; temperature
and voltage will lie within the outer bounding lines of the V-I curve of Figure 14 on
38d. The driver pull-up current variation within nominal limits of voltage and temper-
ature is expected, but not guaranteed, to lie within the inner bounding lines of the
38e. The full ratio variation of MAX to MIN pull-up and pull-down current should be
between 0.71 and 1.4 for drain-to-source voltages from 0.1V to 1.0V at the same
voltage and temperature.
38f. The full ratio variation of the nominal pull-up to pull-down current should be
unity ±10% for device drain-to-source voltages from 0.1V to 1.0V.
Figure 13:
Full Drive Pull-Down Characteristics
Figure 14:
Full Drive Pull-Up Characteristics
39. Reduced output drive curves:
39a. The full driver pull-down current variation from MIN to MAX process; tempera-
ture and voltage will lie within the outer bounding lines of the V-I curve of
39b. The driver pull-down current variation, within nominal voltage and temperature
limits, is expected, but not guaranteed, to lie within the inner bounding lines of
the V-I curve of Figure 15 on page 39.
39c. The full driver pull-up current variation from MIN to MAX process; temperature
and voltage will lie within the outer bounding lines of the V-I curve of Figure 16.
0
20
40
60
80
100
120
140
160
0.0
0.5
1.0
1.5
2.0
2.5
IOUT
(mA)
VOUT (V)
-200
-180
-160
-140
-120
-100
-80
-60
-40
-20
0
0.0
0.5
1.0
1.5
2.0
2.5
IOUT
(mA)
VDDQ - VOUT (V)
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