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| 型號： | MSP34X1G |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Multistandard Sound Processor Family with Virtual Dolby Surround |
| 中文描述： | 多標(biāo)準(zhǔn)聲音處理器系列與虛擬杜比環(huán)繞聲 |
| 文件頁數(shù)： | 53/104頁 |
| 文件大?。?/td> | 871K |
| 代理商： | MSP34X1G |
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PRELIMINARY DATA SHEET
MSP 34x1G
Micronas
53
4.3. Pin Descriptions
Pin numbers refer to the 80-pin PQFP package.
Pin 1,
NC
–
Pin not connected.
Pin 2,
I2C_CL
–
I
2
C Clock Input/Output (Fig. 4
–
18)
Via this pin, the I
2
C-bus clock signal has to be sup-
plied. The signal can be pulled down by the MSP in
case of wait conditions.
Pin 3,
I2C_DA
–
I
2
C Data Input/Output (Fig. 4
–
18)
Via this pin, the I
2
C-bus data is written to or read from
the MSP.
Pin 4,
I2S_CL
–
I
2
S Clock Input/Output (Fig. 4
–
19)
Clock line for the I
2
S bus. In master mode, this line is
driven by the MSP; in slave mode, an external I
2
S
clock has to be supplied.
Pin 5,
I2S_WS
–
I
2
S Word Strobe Input/Output
(Fig. 4
–
19)
Word strobe line for the I
2
S bus. In master mode, this
line is driven by the MSP; in slave mode, an external
I
2
S word strobe has to be supplied.
Pin 6,
I2S_DA_OUT
–
I
2
S Data Output (Fig. 4
–
23)
Output of digital serial sound data of the MSP on the
I
2
S bus.
Pin 7,
I2S_DA_IN1
–
I
2
S Data Input 1 (Fig. 4
–
15)
First input of digital serial sound data to the MSP via
the I
2
S bus.
Pin 8,
ADR_DA
–
ADR Bus Data Output (Fig. 4
–
23)
Output of digital serial data to the DRP 3510A via the
ADR bus.
Pin 9,
ADR_WS
–
ADR Bus Word Strobe Output
(Fig. 4
–
23)
Word strobe output for the ADR bus.
Pin 10,
ADR_CL
–
ADR Bus Clock Output (Fig. 4
–
23)
Clock line for the ADR bus.
Pins 11, 12, 13,
DVSUP*
–
Digital Supply Voltage
Power supply for the digital circuitry of the MSP. Must
be connected to a
+
5 V power supply.
Pins 14, 15, 16,
DVSS*
–
Digital Ground
Ground connection for the digital circuitry of the MSP.
Pin 17,
I2S_DA_IN2
–
I
2
S Data Input 2 (Fig. 4
–
15)
Second input of digital serial sound data to the MSP
via the I
2
S bus.
Pins 18, 19, 20,
NC
–
Pins not connected.
Pin 21,
RESETQ
–
Reset Input (Fig. 4
–
11)
In the steady state, high level is required. A low level
resets the MSP 34x1G.
Pins 22, 23,
NC
–
Pins not connected.
Pins 24, 25,
DACA_R/L
–
Headphone Outputs
(Fig. 4
–
21)
Output of the headphone signal. A 1-nF capacitor to
AHVSS must be connected to these pins. The DC off-
set on these pins depends on the selected headphone
volume.
Pin 26,
VREF2
–
Reference Ground 2
Reference analog ground. This pin must be connected
separately to ground (AHVSS). VREF2 serves as a
clean ground and should be used as the reference for
analog connections to the loudspeaker and head-
phone outputs.
Pins 27, 28,
DACM_R/L
–
Loudspeaker Outputs
(Fig. 4
–
21)
Output of the loudspeaker signal. A 1-nF capacitor to
AHVSS must be connected to these pins. The DC off-
set on these pins depends on the selected loud-
speaker volume.
Pin 29,
NC
–
Pin not connected.
Pin 30,
DACM_SUB
–
Subwoofer Output (Fig. 4
–
21)
Output of the subwoofer signal. A 1-nF capacitor to
AHVSS must be connected to this pin. Due to the low
frequency content of the subwoofer output, the value
of the capacitor may be increased for better suppres-
sion of high-frequency noise. The DC offset on this pin
depends on the selected loudspeaker volume.
Pins 31, 32
NC
–
Pin not connected.
Pins 33, 34,
SC2_OUT_R/L
–
SCART2 Outputs
(Fig. 4
–
22)
Output of the SCART2 signal. Connections to these
pins must use a 100-
series resistor and are intended
to be AC-coupled.
Pin 35,
VREF1
–
Reference Ground 1
Reference analog ground. This pin must be connected
separately to ground (AHVSS). VREF1 serves as a
clean ground and should be used as the reference for
analog connections to the SCART outputs.
Pins 36, 37,
SC1_OUT_R/L
–
SCART1 Outputs
(Fig. 4
–
22)
Output of the SCART1 signal. Connections to these
pins must use a 100-
series resistor and are intended
to be AC-coupled.
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