參數(shù)資料
型號(hào)： MSM9225GA-2K
廠商： OKI ELECTRIC INDUSTRY CO LTD
元件分類： 微控制器/微處理器
英文描述： 2 CHANNEL(S), 1M bps, LOCAL AREA NETWORK CONTROLLER, PQFP44
封裝： 9 X 10 MM, 0.80 MM PITCH, PLASTIC, QFP-44
文件頁(yè)數(shù)： 7/74頁(yè)
文件大?。?/td> 487K
代理商： MSM9225GA-2K
Semiconductor
MSM9225
15/73
(3) Error interrupt output enable: EINTE
When an error occurs, this bit is used to output error interrupt signal INTE from interrupt
pin INT.
When EINTE is "0", an error interrupt signal is not output from the interrupt pin.
When EINTE is "1", an error interrupt signal is output from the interrupt pin.
At reset, EINTE is set to "0".
(4) Transmission interrupt request flag: ITF
ITF becomes "1" when a transmission interrupt is generated. Only "0" can be written to
this bit.
At reset, ITF is set to "0".
(5) Receive interrupt request flag: IRF
IRF becomes "1" when a receive interrupt is generated. Only "0" can be written to this bit.
At reset, IRF is set to "0".
(6) Error interrupt request flag: IEF
IEF becomes "1" when an error occurs. Only "0" can be written to this bit.
At reset, IEF is set to "0".
(7) Master interrupt control enable: MEINT
This bit is used to set enable/disable of communication interrupts.
The flowchart of interrupt control is shown below.
When MEINT is "0", interrupt request control is disabled.
When MEINT is "1", interrupt request control is enabled.
At reset, MEINT is set to "0".
EIT (each message)
ITF
Interrupt factor
(transmission completion)
EINTT
1
0
EIR (each message)
IRF
Interrupt factor
(reception completion)
EINTR
1
0
EINTE
1
0
IEF
Interrupt factor (An error occurs)
MEINT
1
0
INT pin
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