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參數(shù)資料
| 型號： | MSM9225GA-2K |
| 廠商： | OKI ELECTRIC INDUSTRY CO LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), 1M bps, LOCAL AREA NETWORK CONTROLLER, PQFP44 |
| 封裝： | 9 X 10 MM, 0.80 MM PITCH, PLASTIC, QFP-44 |
| 文件頁數(shù)： | 10/74頁 |
| 文件大?。?/td> | 487K |
| 代理商： | MSM9225GA-2K |
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Semiconductor
MSM9225
18/73
(1) Time segment 1: TSEG13 to TSEG10
This is a 4-bit register to set the sampling point.
The relationship between bit content and TSEG1 is as follows:
At reset, TSEG13 to TSEG10 are set to "0000".
(2) Time segment 2: TSEG22 to TSEG20
This is a 3-bit register to set the transmit point.
The relationship between the bit content and TSEG2 is as follows:
At reset, TSEG22 to TSEG20 are set to "000".
TSEG13
TSEG12
TSEG11
TSEG10
TSEG1
0000
0001
1110
1111
1 BTL cycle
2 BTL cycle
15 BTL cycle
16 BTL cycle
TSEG22
TSEG21
TSEG20
TSEG2
000
001
110
111
1 BTL cycle
2 BTL cycle
7 BTL cycle
8 BTL cycle
5. CAN bus timing register 1 (BTR1: 2Ehex)
This register sets the sampling count, sampling point and transmit point used for bus timing.
Writing to the BTR1 bit is enabled, when the INIT bit of the CAN control register (CANC:
0Ehex) is "1".
The bit configuration is as follows:
76543210
Address MSB
2Eh
LSB
TSEG10 :
TSEG11 :
TSEG12 :
TSEG13 :
TSEG20 :
TSEG21 :
TSEG22 :
Not used :
Time
segment 1
Time
segment 2
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