參數(shù)資料
型號(hào)： MSM9225GA-2K
廠商： OKI ELECTRIC INDUSTRY CO LTD
元件分類： 微控制器/微處理器
英文描述： 2 CHANNEL(S), 1M bps, LOCAL AREA NETWORK CONTROLLER, PQFP44
封裝： 9 X 10 MM, 0.80 MM PITCH, PLASTIC, QFP-44
文件頁(yè)數(shù)： 55/74頁(yè)
文件大小： 487K
代理商： MSM9225GA-2K
Semiconductor
MSM9225
59/73
7. Baud rate control function
(1) Prescaler
The MSM9225 has a prescaler that divides the frequency of the system clock. The prescaler
divides the system clock frequency by a factor of 1 to 64 to generate clock CKBTL. (BTL: Bit
Time Logic)
(2) Bit timing
The timing for 1 data bit is defined below.
Sync segment
Prop segment
Phase segment 1
Phase segment 2
Bit time
Sampling point
Definition for CAN protocol
Sync segment
SJW1
TSEG1
TSEG2
Bit time
Sampling point
Definition for MSM9225
SJW2
Sync segment
: This is the first segment for bit synchronization.
Prop segment
: This segment absorbs the delay of the output buffer, CAN bus and input
buffer.
Set the prop segment so that Ack will be returned by the start of phase
segment 1.
Prop segment time
≥ (output buffer delay) + (CAN bus delay) + (input
buffer delay)
Phase segments
: These segments compesate for deviations in the data bit timing.
The larger these segments, the greater the allowable deviation, however
communication speed will decrease.
SJW
: Abbreviation of reSynchronization Jump Width. These bits set the bit
synchronization range.
Segment name
Segment length (BTL)
CAN protocol
MSM9225
Sync segment
(Synchronization segment)
Sync segment
(Synchronization segment)
1
Prop segment
(Propagation segment)
SJW1
1 to 4, programmable
TSEG1
(Time segment)
1 to 16, programmable
Phase segment 1
(Phase Buffer segment)
TSEG2
(Time segment)
1 to 8, programmable
Phase segment 2
(Phase buffer segment)
SJW2 protocol
1 to 4, programmable
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