553
6437E–ATARM–23-Apr-13
SAM9M11
When destination peripheral is defined as the flow controller, if the destination width is
smaller than the source width, then a data loss may occur, and the loss is equal to Source
Single Transfer size in bytes- destination Single Transfer size in bytes.
When a Memory to Peripheral transfer occurs if the destination peripheral is flow controller,
then a prefetch operation is performed. It means that data are extracted from memory before
any request from the peripheral is generated.
You must program the DMAC_SADDRx and DMAC_DADDRx channel registers with a byte,
half-word and word aligned address depending on the source width and destination width.
After the software disables a channel by writing into the channel disable register, it must re-
enable the channel only after it has polleda0inthe corresponding channel enable status
register. This is because the current AHB Burst must terminate properly.
If you program the BTSIZE field in the DMAC_CTRLA, as zero, and the DMAC is defined as
the flow controller, then the channel is automatically disabled.
When hardware handshaking interface protocol is fully implemented, a peripheral is expected
to deassert any sreq or breq signals on receiving the ack signal irrespective of the request
the ack was asserted in response to.
Multiple Transfers involving the same peripheral must not be programmed and enabled on
different channel, unless this peripheral integrates several hardware handshaking interface.
When a Peripheral is flow controller, the targeted DMAC Channel must be enabled before the
Peripheral. If you do not ensure this the DMAC Channel might miss a Last Transfer Flag, if
the First DMAC request is also the last transfer.
When AUTO Field is set to TRUE, then the BTSIZE Field is automatically reloaded from its
previous value. BTSIZE must be initialized to a non zero value if the first transfer is initiated
with AUTO field set to TRUE even if LLI mode is enabled because the LLI fetch operation will
not update this field.