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6437E–ATARM–23-Apr-13
SAM9M11
44.4.2
Start Modes
The SMOD field in the AES Mode Register (AES_MR) allows selection of the encryption (or
decryption) start mode.
44.4.2.1
Manual Mode
The sequence is as follows:
Write the 128-bit/192-bit/256-bit key in the Key Registers (AES_KEYWRx).
Write the initialization vector (or counter) in the Initialization Vector Registers (AES_IVRx).
Note:
The Initialization Vector Registers concern all modes except ECB.
Set the bit DATRDY (Data Ready) in the AES Interrupt Enable register (AES_IER),
depending on whether an interrupt is required or not at the end of processing.
Write the data to be encrypted/decrypted in the authorized Input Data Registers (See
TableNote:
In 64-bit CFB mode, writing to AES_IDATAR2 and AES_IDATAR3 registers is not allowed and may
lead to errors in processing.
Note:
In 32-, 16- and 8-bit CFB modes, writing to AES_IDATAR1, AES_IDATAR2 and AES_IDATAR3
registers is not allowed and may lead to errors in processing.
Set the START bit in the AES Control register AES_CR to begin the encryption or the
decryption process.
When processing completes, the bit DATRDY in the AES Interrupt Status Register
(AES_ISR) raises. If an interrupt has been enabled by setting the bit DATRDY in AES_IER,
the interrupt line of the AES is activated.
When the software reads one of the Output Data Registers (AES_ODATARx), the DATRDY
bit is automatically cleared.
44.4.2.2
Auto Mode
The Auto Mode is similar to the manual one, except that in this mode, as soon as the correct
number of Input Data registers is written, processing is automatically started without any action
in the Control Register.
Table 44-2.
Authorized Input Data Registers
Operation Mode
Input Data Registers to Write
ECB
All
CBC
All
OFB
All
128-bit CFB
All
64-bit CFB
AES_IDATAR0 and AES_IDATAR1
32-bit CFB
AES_IDATAR0
16-bit CFB
AES_IDATAR0
8-bit CFB
AES_IDATAR0
CTR
All