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型號(hào)：	MQ80C52CXXX-25P883R
廠商：	TEMIC SEMICONDUCTORS
元件分類：	微控制器/微處理器
英文描述：	8-BIT, MROM, 25 MHz, MICROCONTROLLER, CQFP44
文件頁(yè)數(shù)：	265/849頁(yè)
文件大?。?/td>	12530K
代理商：	MQ80C52CXXX-25P883R

32099I–01/2012

AT32UC3L016/32/64

Figure 18-5. Interrupt Timing with Glitch Filter Enabled

CPU Local Bus

The CPU Local Bus can be used for application where low latency read and write access to the

Output Value Register (OVR) and Output Drive Enable Register (ODER) is required. The CPU

Local Bus allows the CPU to configure the mentioned GPIO registers directly, bypassing the

shared Peripheral Bus (PB).

To avoid data loss when using the CPU Local Bus, the CLK_GPIO must run at the same fre-

quency as the CLK_CPU. See Section 18.5.2 for details.

The CPU Local Bus is mapped to a different base address than the GPIO but the OVER and

ODER offsets are the same. See the CPU Local Bus Mapping section in the Memories chapter

for details.

Peripheral Events

Peripheral events allow direct peripheral to peripheral communication of specified events. See

the Peripheral Event System chapter for more information.

The GPIO can be programmed to output peripheral events whenever an interrupt condition is

detected. The peripheral events configuration depends on the interrupt configuration. An event

will be generated on the same condition as the interrupt (pin change, rising edge, or falling

edge). The interrupt configuration is controlled by the IMR register. Peripheral event on a pin is

enabled by writing a one to the corresponding bit in the Event Enable Register (EVER). The

Peripheral Event trigger mode is shared with the interrupt trigger and is configured by writing to

the IMR0 and IMR1 registers. Interrupt does not need to be enabled on a pin when peripheral

events are enabled. Peripheral Events are also affected by the Input Glitch Filter settings. See

A peripheral event can be generated on each GPIO pin. Each port can then have up to 32

peripheral event generators. Groups of eight peripheral event generators in each port are ORed

together to form a peripheral event line, so that each port has four peripheral event lines con-

nected to the Peripheral Event System.

相關(guān)PDF資料	PDF描述
MQ80C52CXXX-25P883R	8-BIT, MROM, 25 MHz, MICROCONTROLLER, CQFP44
MQ80C154-16P883D	8-BIT, 16 MHz, MICROCONTROLLER, CQFP44
R83C154DXXX-20D	8-BIT, MROM, 20 MHz, MICROCONTROLLER, CQCC44
R80C52EXXX-16D	8-BIT, MROM, 16 MHz, MICROCONTROLLER, CQCC44
IF8680A	8-BIT, 8 MHz, MICROCONTROLLER, PQFP160

相關(guān)代理商/技術(shù)參數(shù)	參數(shù)描述
MQ82370-20	制造商:Rochester Electronics LLC 功能描述:- Bulk
MQ8238020	制造商:Intel 功能描述:CONTROLLER: OTHER
MQ82380-20	制造商:Rochester Electronics LLC 功能描述:- Bulk
MQ82380-20/R	制造商:Rochester Electronics LLC 功能描述:
MQ82592	制造商:Rochester Electronics LLC 功能描述:- Bulk

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