447
SAM9G45 [DATASHEET]
6438K–ATARM–12-Feb-13
mum additional delay that can be programmed on a PAD supporting this feature is 1/16 of the maximum
programmable delay.
Only PADs PC[12], PC[7:2], PA[30:23] and PA[9:2] can be configured.
When programming 0x0 in fields, no delay is added (reset value) and the propagation delay of the pad buffers is
the inherent delay of the pad buffer. When programming 0xF in field, the propagation delay of the corresponding
pad is maximal.
Figure 30-7. Programmable I/O Delays
30.5
I/O Lines Programming Example
The programing example as shown in
Table 30-1 below is used to define the following configuration.
4-bit output port on I/O lines 0 to 3, (should be written in a single write operation), open-drain, with pull-up
resistor
Four output signals on I/O lines 4 to 7 (to drive LEDs for example), driven high and low, no pull-up resistor
Four input signals on I/O lines 8 to 11 (to read push-button states for example), with pull-up resistors, glitch
filters and input change interrupts
Four input signals on I/O line 12 to 15 to read an external device status (polled, thus no input change interrupt),
no pull-up resistor, no glitch filter
I/O lines 16 to 19 assigned to peripheral A functions with pull-up resistor
I/O lines 20 to 23 assigned to peripheral B functions, no pull-up resistor
I/O line 24 to 27 assigned to peripheral A with Input Change Interrupt and pull-up resistor
DELAY1
Programmable Delay Line
PIO
PAout[0]
PAin[0]
DELAY2
Programmable Delay Line
DELAYx
Programmable Delay Line
PAout[1]
PAin[1]
PAout[2]
PAin[2]
Table 30-1.
Programming Example
Register
Value to be Written
PIO_PER
0x0000 FFFF
PIO_PDR
0x0FFF 0000
PIO_OER
0x0000 00FF
PIO_ODR
0x0FFF FF00