149
SAM9G45 [DATASHEET]
6438K–ATARM–12-Feb-13
19.7.6.3
EBI Chip Select Assignment Register
Name:
CCFG_EBICSA
Access:
Read-write
Reset:
0x00070000
EBI_CS1A: EBI Chip Select 1 Assignment
0 = EBI Chip Select 1 is assigned to the Static Memory Controller.
1 = EBI Chip Select 1 is assigned to the SDRAM Controller.
EBI_CS3A: EBI Chip Select 3 Assignment
0 = EBI Chip Select 3 is only assigned to the Static Memory Controller and EBI_NCS3 behaves as defined by the SMC.
1 = EBI Chip Select 3 is assigned to the Static Memory Controller and the SmartMedia Logic is activated.
EBI_CS4A: EBI Chip Select 4 Assignment
0 = EBI Chip Select 4 is only assigned to the Static Memory Controller and EBI_NCS4 behaves as defined by the SMC.
1 = EBI Chip Select 4 is assigned to the Static Memory Controller and the Compact Flash Logic Slot 0 is activated.
EBI_CS5A: EBI Chip Select 5 Assignment
0 = EBI Chip Select 5 is only assigned to the Static Memory Controller and EBI_NCS5 behaves as defined by the SMC.
1 = EBI Chip Select 5 is assigned to the Static Memory Controller and the Compact Flash Logic Slot 1 is activated.
EBI_DBPUC: EBI Data Bus Pull-Up Configuration
0 = EBI D0 - D15 Data Bus bits are internally pulled-up to the VDDIOM1 power supply.
1 = EBI D0 - D15 Data Bus bits are not internally pulled-up.
EBI_DRIVE: EBI I/O Drive Configuration
This allows to avoid overshoots and give the best performances according to the bus load and external memories.
31
30
29
28
27
26
25
24
––––––––
23
22
21
20
19
18
17
16
–––––
DDR_DRIVE
EBI_DRIVE
15
14
13
12
11
10
9
8
–––––––
EBI_DBPUC
76543210
–
EBI_CS5A
EBI_CS4A
EBI_CS3A
–
EBI_CS1A
–
Value
Drive configuration
Conditions
00
optimized for 1.8V powered memories with Low Drive
Maximum load capacitance < 30 pF
01
optimized for 3.3V powered memories with Low Drive
Maximum load capacitance < 30 pF
10
optimized for 1.8V powered memories with High Drive
Maximum load capacitance < 55 pF
11
optimized for 3.3V powered memories with High Drive
Maximum load capacitance < 55 pF