參數(shù)資料
型號: MPC7400RX300LX
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 300 MHz, RISC PROCESSOR, CBGA360
封裝: 25 X 25 MM, 3.20 MM HEIGHT, 1.27 MM PITCH, CERAMIC, BGA-360
文件頁數(shù): 12/44頁
文件大小: 504K
代理商: MPC7400RX300LX
2
MPC7400 RISC Microprocessor Hardware Specications
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Overview
1.1 Overview
The MPC7400 is the rst implementation of the fourth generation (G4) of PowerPC microprocessors from
Motorola. The MPC7400 implements the full PowerPC 32-bit architecture and is targeted at both portable
and computing systems applications. Some comments on the MPC7400 (with respect to MPC750):
The MPC7400 adds an implementation of the new AltiVec technology instruction set
The MPC7400 includes signicant improvements in memory subsystem (MSS) bandwidth and
offers an optional, high-bandwidth MPX bus interface
The MPC7400 adds full hardware-based multiprocessing capability, including a 5-state cache
coherency protocol (4 MESI states plus a fth state for shared intervention)
The MPC7400 is implemented in a next generation process technology for core frequency
improvement
The MPC7400 oating-point unit has been improved to make latency equal for double-precision
and single-precision operations involving multiplication
The completion queue has been extended to 8 slots
There are no other signicant changes to scalar pipelines, decode/dispatch/completion mechanisms,
or the branch unit. The MPC750’s 4-stage pipeline model is unchanged (fetch, decode/dispatch,
execute, complete/writeback)
Figure 1 shows a block diagram of the MPC7400.
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