參數(shù)資料
型號(hào): MPC5554AVR132R2
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: MICROCONTROLLER, PBGA416
封裝: 27 X 27 MM, 1 MM PITCH, LEAD FREE, PLASTIC, MS-034AAL-1, TEPBGA-416
文件頁數(shù): 49/58頁
文件大?。?/td> 1452K
代理商: MPC5554AVR132R2
Revision History for the MPC5554 Data Sheet
MPC5554 Microcontroller Data Sheet, Rev. 2.0
Freescale Semiconductor
53
Rev. 2.0
Table 14 Flash Program and Erase Specifications: Inserted new values for the H7Fa Flash
pre-program and erase times and used the previous values for Typical and Initial Max values.
Typical Values —
16 KB: from 325 to 265
48 KB: from 435 to 340
64 KB: from 525 to 400
128 KB: from 675 to 500
Initial Max Values —
16 KB: from 525 to 400
48 KB: from 525 to 400
64 KB: from 675 to 500
128 KB: from 1800 to 1250
Table 16 FLASH BIU Settings vs. Frequency of Operations: Changed footnote 6 from: ‘Allows for
128 MHz system clock with 2% frequency modulation’
to: ‘132 MHz parts allow for 128 MHz system clock + 2% FM.’
3/19/07
Rev. 2.0
Table 27 EQADC SSI Timing Characteristics: Footnote 2: added ‘cycle’ after ‘duty’ to read: FCK
duty cycle is not 50% when . . . .
3/26/07
Rev. 2.0
Table 12 FMPLL Electrical Specifications:
Changed Spec 21, column 2:
substituted fref_crystal for fref in ICO frequency equation, and added the same equation but
substituted fref_ext for fref for the external reference clock, giving:
fico = [ fref_crystal × (MFD + 4) ] ÷ (PREDIV + 1)
fico = [ fref_ext × (MFD + 4) ] ÷ (PREDIV + 1)
Changed Spec 22: from ‘maximum frequency for the predivider’ to ‘20 MHz’.
4/25/07
Rev. 2.0
Table 21, Nexus Debug Port Timing. Changed Spec 12, TCK Low to TDO Data Valid,
‘VDDE = 3.0 to 3.6 volts’ maximum value in column 4 from 9 to 10. Now reads
‘VDDE = 3.0–3.6 V’ with a max value of 10.
4/27/07
Rev. 2.0
Table 2 Absolute Maximum Ratings: Added the name of the Spec 21, VRC33 to VDDSYN
differential voltage and the name of the Table, DC Electrical Specifications, to which the Spec
was moved.
Table 4 EMI Testing Specifications, Spec 2: Added in the Max column a footnote that reads:
Refer to Table 1 for the maximum operating frequency.
Table 5 ESD Characteristics: Added (Electromagnetic Static Discharge) in the table title.
Figure 3 ISTBY Worst-case Specifications: Replaced the ISTBY graph.
Table 9 DC Electrical Specifications:
Corrected footnote 3 to read: If standby operation is not required, connect the VSTBY to
ground.
Changed Spec 26: Changed ‘AN[12]_MA[1]_SDO’ to ‘AN[13]_MA[1]_SDO’.
Table 12 FMPLL Electrical Specifications:
Added to the beginning of footnote 1 ‘Nominal crystal and external references values are at
worst-case not more than 1%’.
Changed Spec 22, column 4, Max Value from fMAX to 20, and added footnote 20 to read,
‘Maximum value for Dual Controller (1:1) mode is (fMAX ÷ 2) with the predivider set to 1
(FMPLL_SYNCR[PREDIV] = 0b001).’
Table 14 Flash Program and Erase Specifications:
Spec 8, 128KB block pre-program and erase time, Max column value from 15,000 to 7,500.
Table 15 Flash EEPROM Module Life (Full Temperature Change):
Spec 1b, Min. column value changed from 10,000 to 1,000.
Table 21 Nexus Debug Port Timing,
Spec 12: Changed value in Max column from 9 to 10 for the VDDE = 3.0–3.6 V row.
5/3/07
Table 28. MPC5554 Revision History (continued)
Revision
Substantive Change(s)
Date
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