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參數(shù)資料
| 型號： | ML60851AGA |
| 廠商： | OKI ELECTRIC INDUSTRY CO LTD |
| 元件分類： | 總線控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP44 |
| 封裝： | 9 X 10 MM, 0.80 MM PITCH, PLASTIC, QFP-44 |
| 文件頁數(shù)： | 9/45頁 |
| 文件大?。?/td> | 358K |
| 代理商： | ML60851AGA |
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ML60851A
Semiconductor
17/44
Endpoint 0 Transmit Control Register (F0h, –)
RFU
D7
D6
D5
D4
D3
D2
D1
D0
0
RFU
Transfer Type (R)
Endpoint 0 Transmit General Register (F1h, –)
RFU
D7
D6
D5
D4
D3
D2
D1
D0
Data Sequence
Toggle Bit (R)
Endpoint 0 Transmit Payload Register (F2h, 72h)
Maximum Packet Size (R/W)
D7
D6
D5
D4
D3
D2
D1
D0
RFU
Endpoint 0 Transmit General Register (F3h, 73h)
RFU
D7
D6
D5
D4
D3
D2
D1
D0
Setup Ready (R/Reset)
RFU
Stall Bit (R/W)
EP0 Stage (R)
00 = Setup Stage
01 = Data Stage
10 = Status Stage
Setup Ready: When a valid setup packet has arrived at an 8-byte setup register, this register is
automatically set and the receive FIFO at endpoint 0 is locked. Writing "1" in this register resets Setup
Ready. When the data stage of Control Write transaction follows, Packet Ready at endpoint 0 is also
reset. Therefore, the endpoint 0 receive FIFO is unlocked and ready to receive the packets in the data
stage.
The value of this register remains unchanged when "0" is written in this register.
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| ML60851ATB | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:USB Device Controller |
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