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參數(shù)資料
| 型號(hào)： | ML60851AGA |
| 廠商： | OKI ELECTRIC INDUSTRY CO LTD |
| 元件分類： | 總線控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP44 |
| 封裝： | 9 X 10 MM, 0.80 MM PITCH, PLASTIC, QFP-44 |
| 文件頁數(shù)： | 45/45頁 |
| 文件大?。?/td> | 358K |
| 代理商： | ML60851AGA |
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ML60851A
Semiconductor
9/44
Endpoint 0 Receive Byte Count Register (C9h, –)
RFU
D7
D6
D5
D4
D3
D2
D1
D0
EP0 Byte Count (R)
RFU
D7
D6
D5
D4
D3
D2
D1
D0
EP1 Byte Count (R)
Endpoint 1 Receive Byte Count Register (CAh, –)
RFU
D7
D6
D5
D4
D3
D2
D1
D0
EP2 Byte Count (R)
Endpoint 2 Receive Byte Count Register (CBh, –)
Flash Transmit FIFO (–, 4Eh)
System Control (–, 4Fh)
0
D7
D6
D5
D4
D2
D1
D0
D3
00
0
In case EP1 is set as a transmission endpoint, when "1" is
written in this bit, the FIFO at EP1 is cleared and Packet
Ready at EP1 is reset by the WRITE pulse.
In case EP2 is set as a transmission endpoint, when "1" is
written in this bit, the FIFO at EP2 is cleared and Packet
Ready at EP2 is reset by the WRITE pulse.
In case EP3 is set as a transmission endpoint, when "1" is
written in this bit, the FIFO at EP3 is cleared and Packet
Ready at EP3 is reset by the WRITE pulse.
D7
D6
D5
D4
D2
D1
D0
D3
0
When "1" is written in this bit, the ML60851A is reset
by the WRITE pulse.
0
Oscillation Stop Command
Oscillation Stop Command: Writing 1010b to D7 to D4, (writing A0h into this register) causes the
oscillator circuit of the ML60851A to be deactivated and go into the standby mode.
When oscillation is stopped, reading and writing into the register is possible but reading and writing
into FIFO is not possible. Asserting the RESET pin restarts oscillation.
Note: Please clear all FIFOs at the same time, otherwise some of them may not be cleared.
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