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參數(shù)資料
| 型號(hào)： | ML60851AGA |
| 廠商： | OKI ELECTRIC INDUSTRY CO LTD |
| 元件分類： | 總線控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP44 |
| 封裝： | 9 X 10 MM, 0.80 MM PITCH, PLASTIC, QFP-44 |
| 文件頁數(shù)： | 4/45頁 |
| 文件大?。?/td> | 358K |
| 代理商： | ML60851AGA |
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ML60851A
Semiconductor
12/44
Interrupt Status Register (DCh, 5Ch) (R)
D7
D6
D5
D4
D3
D2
D1
D0
Setup Ready
Interrupt Status (R)
EP1 Packet Ready
Interrupt Status (R)
EP2 Packet Ready
Interrupt Status (R)
EP0 Receive Packet Ready
Interrupt Status (R)
EP0 Transmit Packet Ready
Interrupt Status (R)
Suspended State
Interrupt Status (R)
USB Bus Reset
Interrupt Status
EP3 Packet Ready
Interrupt Status
SetupReadyInterruptStatus: EquivalenttoSetupReadyat(F3h)describedlaterwhenthecorresponding
Interrupt Enable bit is asserted.
EP1 Packet Ready Interrupt Status: Equivalent to EP1 Receive Packet Ready (the complement of EP1
Transmit Packet Ready when EP1 is set for transmitter) at (C8h) described before when the
corresponding Interrupt Enable bit is asserted.
EP2 Packet Ready Interrupt Status: Equivalent to EP2 Receive Packet Ready (the complement of EP2
Transmit Packet Ready when EP2 is set for transmitter) at (C8h) described before when the
corresponding Interrupt Enable bit is asserted.
EP0ReceivePacketReadyInterruptStatus: EquivalenttoEP0ReceivePacket Ready at (C8h) described
before when the corresponding Interrupt Enable bit is asserted.
EP0 Transmit Packet Ready Interrupt Status: Equivalent to the complement of EP0 Transmit Packet
Ready at (C8h) described before when the corresponding Interrupt Enable bit is asserted.
USB Bus Reset Interrupt Status: This bit is set to "1" at USB bus reset when the D5 bit of the interrupt
enable register (DBh) is "1". To return this bit back to "0", "1" should be written to the D5 bit of the
device states register.
Suspended State Interrupt Status: Equivalent to Suspended State Register at (C1h) described before
when the corresponding Interrupt Enable bit is asserted.
EP3 Packet Ready Interrupt Status: When the D7 bit of the interrupt enable register (DBh) is "1", the
complement of the D7 bit of the endpoint packet ready register (C8h) is being copied.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ML60851ATB | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:USB Device Controller |
| ML60851C | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:USB Device Controller |
| ML60851CGA | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:USB Device Controller |
| ML60851CTB | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:USB Device Controller |
| ML60851D | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:USB Device Controller |
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