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參數(shù)資料
| 型號(hào)： | ML60851AGA |
| 廠商： | OKI ELECTRIC INDUSTRY CO LTD |
| 元件分類： | 總線控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP44 |
| 封裝： | 9 X 10 MM, 0.80 MM PITCH, PLASTIC, QFP-44 |
| 文件頁(yè)數(shù)： | 13/45頁(yè) |
| 文件大?。?/td> | 358K |
| 代理商： | ML60851AGA |
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ML60851A
Semiconductor
20/44
Endpoint 0 Transmit FIFO Data (–, C0h)
Area to store data to be transmitted from this device to the host computer in the data stage of Control
Read transter.
Endpoint 1 Transmit FIFO Data (–, C1h)
Area to store data to be transmitted from EP1 of this device to the host computer in Bulk In transfer.
This register is valid only when EP1 is set for the IN endpoint.
Endpoint 2 Transmit FIFO Data (–, C2h)
Area to store data to be transmitted from EP2 of this device to the host computer in Bulk In transfer.
This register is valid only when EP2 is set for the IN endpoint.
Endpoint 3 Transmit FIFO Data (–, C3h)
D7
D6
D5
D4
D3
D2
D1
D0
Endpoint 0 Transmit FIFO Data (W)
D7
D6
D5
D4
D3
D2
D1
D0
Endpoint 1 Transmit FIFO Data (W)
D7
D6
D5
D4
D3
D2
D1
D0
Endpoint 2 Transmit FIFO Data (W)
D7
D6
D5
D4
D3
D2
D1
D0
Endpoint 3 Transmit FIFO Data (W)
Area to store data to be transmitted from EP3 of this device to the host computer in Bulk In transfer.
This register is valid only when EP3 is set for the IN endpoint.
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