- 您現(xiàn)在的位置：買賣IC網(wǎng) > Datasheet目錄44 > MCP18480T-I/SS (Microchip Technology)IC HOT SWAP CTRLR -48V 20SSOP Datasheet資料下載
參數(shù)資料
| 型號： | MCP18480T-I/SS |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 45/64頁 |
| 文件大?。?/td> | 871K |
| 描述： | IC HOT SWAP CTRLR -48V 20SSOP |
| 標(biāo)準(zhǔn)包裝： | 1,600 |
| 類型： | 熱交換控制器 |
| 應(yīng)用： | IP 電話，LAN 網(wǎng)絡(luò)供電，網(wǎng)絡(luò)路由器和交換機 |
| 內(nèi)部開關(guān)： | 無 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SSOP（0.209"，5.30mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-SSOP |
| 包裝： | 帶卷 (TR) |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁當(dāng)前第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁
?2003 Microchip Technology Inc.
DS20091B-page 45
MCP18480
6.8.2
OV (OVERVOLTAGE) BLOCK
The overvoltage block behaves similarly to the under-
voltage block in that it monitors an input voltage by
comparing a centertap voltage on an external voltage
divider (on the OV
TH
pin) to the V
REFIN
pin voltage.
If the centertap voltage is below the reference, the input
voltage is not excessive. If the centertap voltage is
greater than the V
NEG
+ V
REFIN
pin voltages, the sup-
ply voltage is higher than the programmed acceptable
maximum voltage limit. An internal flag is then acti-
vated to inform the MCP18480 that the input voltage
has exceeded the preset limit.
The Overvoltage Active signal deasserts when the
input voltage drops back below the threshold
determined by the external resistors (R
OV1
and R
OV2
).
EQUATION 6-4: OVERVOLTAGE VOLTAGE
CONDITION
6.8.3
FET-GOOD BLOCK
The FET-good block monitors the voltage between the
drain of the external MOSFET and on the V
NEG
pin at
power-up. It delays assertion of PWRGOOD until the
drain-to-source voltage of the external FET is accept-
ably low and the voltage at the GATE pin is about 8V.
The comparator operation is similar to Undervoltage
and Overvoltage blocks.
To prevent applying excessive voltages to the gates of
the FETs in the Undervoltage circuit, a resistive voltage
divider is employed between ground and the V
NEG
pin.
Similarly, the drain of the external MOSFET can be
exposed to voltages at around V
NEG
during normal
operation and as high as ground (typically 48V above
V
NEG
).
The FET good block also monitors the GATE pin. When
the GATE pin becomes >V
NEG
+8V and the DRAIN
TH
pin is within its programmed range, the output of the
FET good block is active.
The internal FET good signal goes high and remains
active until a fault condition (Undervoltage, Overvolt-
age or Current Limit) is detected. Any of these condi-
tions hold the PWRGOOD signal deasserted until the
fault condition is removed and the external FET gate
and drain voltages are acceptable.
V
REFIN
V
NEG
R
OV2
"
R
OV1
R
OV2
+
(
)
- - - - -- - - -- - - -- - - -- - - - -- - - -- - - -- - - -- - -
<
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MCP9808T-E/MS | IC TEMP SENSOR DGTL I2C 8MSOP |
| MCZ33998EGR2 | IC REG CHARGEPUMP/LINEAR 24SOIC |
| MCZ34652EFR2 | IC HOTSWAP CTRLR 2A NEG 16SOIC |
| MCZ34653EFR2 | IC HOTSWAP CTRLR 1A NEG 8-SOIC |
| MCZ34670EG | IC POE CURR MODE SW REG 20-SOIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MCP-18H | 制造商:Taiyo Electric Ind. 功能描述: |
| MCP-18-I9-LL | 制造商:YAMAICHI 制造商全稱:Yamaichi Electronics Co., Ltd. 功能描述:MatchCon |
| MCP-18-TI9-LL | 制造商:YAMAICHI 制造商全稱:Yamaichi Electronics Co., Ltd. 功能描述:MatchCon |
| MCP19035-AAAAE/MF | 功能描述:加速傳感器開發(fā)工具 Sync Buck, PWM Ctrl 300Khz, 20ns RoHS:否 制造商:Murata 工具用于評估:SCA3100-D04 加速:2 g 傳感軸:Triple Axis 接口類型:SPI 工作電壓:3.3 V |
| MCP19035-AAABE/MF | 功能描述:加速傳感器開發(fā)工具 Sync Buck, PWM Ctrl 300Khz, 8ns RoHS:否 制造商:Murata 工具用于評估:SCA3100-D04 加速:2 g 傳感軸:Triple Axis 接口類型:SPI 工作電壓:3.3 V |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。