參數(shù)資料
型號: MCF53016CMJ240J
廠商: Freescale Semiconductor
文件頁數(shù): 40/62頁
文件大?。?/td> 0K
描述: IC MCU 32BIT 128KB 256MAPBGA
標準包裝: 450
系列: MCF5301x
核心處理器: Coldfire V3
芯體尺寸: 32-位
速度: 240MHz
連通性: EBI/EMI,以太網(wǎng),I²C,MMC,SPI,SSI,UART/USART,USB,USB OTG
外圍設(shè)備: DMA,PWM,WDT
輸入/輸出數(shù): 83
程序存儲器容量: 16KB(16K x 8)
程序存儲器類型: 緩存
RAM 容量: 128K x 8
電壓 - 電源 (Vcc/Vdd): 1.08 V ~ 3.6 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 256-LBGA
包裝: 托盤
Preliminary Electrical Characteristics
MCF5301x Data Sheet, Rev. 5
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
45
Figure 32. Active-Low-Reset Card Reset Sequence
5.17.3
Power Down Sequence
Power down sequence for SIM interface is as follows:
1.
SIM_PD port detects the removal of the SIM card
2.
SIM_RST goes low
3.
SIM_CLK goes low
4.
SIM_TX goes low
5.
SIM_VEN goes low
Each of these steps is completed in one CKIL period (usually 32 kHz). Power-down may be started in response to a
card-removal detection or launched by the processor. Figure 33 and Table 30 show the usual timing requirements for this
sequence, with Fckil = CKIL frequency value.
Table 30. Timing Requirements for Power Down Sequence
Num
Description
Symbol
Min
Max
Unit
1
SIM reset to SIM clock stop
Srst2clk
0.9
÷ f
CKIL
0.8
s
2
SIM reset to SIM TX data low
Srst2dat
1.8
÷ f
CKIL
1.2
s
3
SIM reset to SIM Voltage Enable Low
Srst2ven
2.7
÷ f
CKIL
1.8
s
4
SIM Presence Detect to SIM reset Low
Spd2rst
0.9
÷ f
CKIL
25
ns
SIM_VEN
SIM_CLK
SIM_RX
2
T0
1
Response
SIM_RST
T1
1
2
< 200 clock cycles
< 40,000 clock cycles
400 clock cycles <
3
400,000 clock cycles <
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