參數(shù)資料
型號: MC9328MX21DVG
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 266 MHz, MICROPROCESSOR, PBGA289
封裝: 14 X 14 MM, 1.41 MM HEIGHT, 0.65 MM PITCH, MAPBGA-289
文件頁數(shù): 51/106頁
文件大?。?/td> 1932K
代理商: MC9328MX21DVG
Specifications
MC9328MX21 Product Preview, Rev. 1.1
Freescale Semiconductor
49
Table 29. SDRAM Timing Parameter Table
Ref
No.
Parameter
1.8V
3.0V +/-10%
Unit
Minimum
Maximum
Minimum
Maximum
1
SDRAM clock high-level width
3.00
4
ns
2
SDRAM clock low-level width
3.00
4
ns
3
SDRAM clock cycle time
11.1
7.5
ns
3S
CS, RAS, CAS, WE, DQM setup time
4.78
3
ns
3H
CS, RAS, CAS, WE, DQM hold time
3.03
2
ns
4S
Address setup time
3.67
3
ns
4H
Address hold time
2.95
2
ns
5
SDRAM access time (CL = 3)
5.4
5.4
ns
5
SDRAM access time (CL = 2)
6.0
6.0
ns
5
SDRAM access time (CL = 1)
ns
6
Data out hold time
3.0
3.0
–ns
7
Data out high-impedance time (CL = 3)
tHZ
1
1. tHZ = SDRAM data out high-impedance time, external SDRAM memory device dependent parameter.
tHZ
1
ns
7
Data out high-impedance time (CL = 2)
tHZ
1
tHZ
1
ns
7
Data out high-impedance time (CL = 1)
ns
8
Active to read/write command period (RC = 1)
tRCD
2
2. tRCD = SDRAM clock cycle time. The tRCD setting can be found in the i.MX21 reference manual.
tRCD
2
–ns
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