參數(shù)資料
型號(hào)： MC9328MX21DVG
廠商： FREESCALE SEMICONDUCTOR INC
元件分類(lèi)： 微控制器/微處理器
英文描述： 266 MHz, MICROPROCESSOR, PBGA289
封裝： 14 X 14 MM, 1.41 MM HEIGHT, 0.65 MM PITCH, MAPBGA-289
文件頁(yè)數(shù)： 32/106頁(yè)
文件大小： 1932K
代理商： MC9328MX21DVG
Specifications
MC9328MX21 Product Preview, Rev. 1.1
Freescale Semiconductor
31
3.10
LCD Controller
This section includes timing diagrams for the LCD controller. For detailed timing diagrams of the LCD
controller with various display configurations, refer to the LCD controller chapter of the i.MX21 Reference
Manual
.
Figure 19. SCLK to LD Timing Diagram
Table 17. Timing Parameter Table for Figure 14 through Figure 18
Ref
No.
Parameter
Minimum
Maximum
Unit
1
SPI_RDY to SS output low
2T 1
1. T = CSPI system clock period (PERCLK2).
–ns
2SS output low to first SCLK edge
3Tsclk 2
2. Tsclk = Period of SCLK.
–ns
3
Last SCLK edge to SS output high
2Tsclk
–
ns
4SS output high to SPI_RDY low
0
–
ns
5SS output pulse width
Tsclk + WAIT 3
3. WAIT = Number of bit clocks (SCLK) or 32.768 KHz clocks per Sample Period Control
Register.
–ns
6SS input low to first SCLK edge
T
–
ns
7SS input pulse width
T
–
ns
Table 18. LCDC SCLK Timing Parameter Table
Symbol
Parameter
3.0 +/- 0.3V
Unit
Minimum
Maximum
T1
SCLK period
23
2000
ns
T2
Pixel data setup time
11
–
ns
T3
Pixel data up time
11
–
ns
The pixel clock is equal to LCDC_CLK / (PCD + 1).
When it is in CSTN, TFT or monochrome mode with bus width = 1, SCLK is equal to the pixel clock.
When it is in monochrome with other bus width settings, SCLK is equal to the pixel clock divided by bus width.
The polarity of SCLK and LD can also be programmed.
Maximum frequency of SCLK is HCLK / 3 for TFT and CSTN, otherwise LD output will be incorrect.
LSCLK
LD[17:0]
T1
T2
T3
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC9328MX21DVGR2 制造商:Rochester Electronics LLC 功能描述:- Bulk
MC9328MX21DVH 制造商:MOTOROLA 制造商全稱(chēng):Motorola, Inc 功能描述:i.MX family of microprocessors
MC9328MX21DVK 功能描述:處理器 - 專(zhuān)門(mén)應(yīng)用 DB I.MX21 PB-FR RoHS:否 制造商:Freescale Semiconductor 類(lèi)型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432
MC9328MX21DVK 制造商:Freescale Semiconductor 功能描述:Microprocessor
MC9328MX21DVKR2 功能描述:處理器 - 專(zhuān)門(mén)應(yīng)用 DB I.MX21 PB-FR RoHS:否 制造商:Freescale Semiconductor 類(lèi)型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432
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