參數(shù)資料
型號(hào)： MC92602ZTA
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： SPECIALTY MICROPROCESSOR CIRCUIT, PBGA196
封裝： MAPBGA-196
文件頁數(shù)： 20/98頁
文件大小： 896K
代理商： MC92602ZTA
MOTOROLA
Chapter 2. Transmitter
2-5
Functional Description
2.3.1.1
Transmitting Uncoded Data
If TBIE is low the transmit data is to be treated as uncoded 8 bit data, that must be encoded
by the on-chip 8B/10B encoder. 8B/10B coding ensures DC balance across the link and
sufcient transition density to facilitate reliable data recovery.
The state of XMIT_x_K on the rising edge of the transmit clock will be referred to as the
“K” bit. The state of XMIT_x_K on the falling edge of the transmit clock will be referred
to as the “Idle” bit. Data transmitted as a function of these two bits are as indicated in
If K is low this 8 bit data is then coded into a 10-bit data character.
If K is high and Idle is low, then the remaining data bits are ignored and the on-chip 8B/10B
encoder creates an IDLE character (K28.5) with the appropriate disparity.
Special control codes may be transmitted by asserting K high, and Idle high The transmit
byte is assumed to be a control code in this state.
2.3.1.2
Transmitting Coded Data
Ten-bit coded data may be transmitted, bypassing the internal 8B/10B encoder. The Ten-Bit
Interface, TBI, mode is enabled by asserting TBIE high. In this mode, the ten bits of data
to transmit are presented on the internal Data Bits 9 through 0 as previously shown in
Special care must be taken when using TBI mode. The 10-bit pre-coded data must exhibit
the same properties as 8B/10B coded data. DC balance must be maintained and there must
be sufcient transition density to ensure reliable data recovery at the receiver.
The receiver requires that the K28.5 Idle character be periodically transmitted to enable
byte and word synchronization. This 10-bit pattern, ‘0011111010’ or ‘1100000101’
(ordered from least signicant bit, bit-0, through most signicant bit, bit-9) is used for
alignment and channel synchronization when operating in any of the byte or word
synchronization modes. The pattern of Idles and data required to achieve byte or word
synchronization depends on the conguration of the receiver. The appropriate sequence
must be applied through the Ten-Bit Interface.
Table 2-4. Transmitter Control States (TBIE=low)
IDLE
K
Description
Don’t care
Low
Transmit data present on internal Data Bits 7 through 0.
Low
High
Transmit Idle (K28.5), ignore internal Data Bits 7 through 0.
High
Transmit control present on internal Data Bits 7 through 0.
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