參數(shù)資料
型號(hào)： MC7447RX1267LB
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 1267 MHz, RISC PROCESSOR, CBGA360
封裝： 25 X 25 MM, 3.20 MM HEIGHT, 1.27 MM PITCH, CERAMIC, FLIP CHIP, BGA-360
文件頁數(shù)： 31/87頁
文件大小： 1586K
代理商： MC7447RX1267LB
MOTOROLA
MPC7457 RISC Microprocessor Hardware Specifications
37
Pinout Listings
TCK
C6
High
Input
BVSEL
TDI
B9
High
Input
BVSEL
6
TDO
A4
High
Output
BVSEL
TEA
L1
Low
Input
BVSEL
TEST[0:3]
A12, B6, B10, E10
—
Input
BVSEL
12
TEST[4]
D10
—
Input
BVSEL
9
TMS
F1
High
Input
BVSEL
6
TRST
A5
Low
Input
BVSEL
6, 14
TS
L4
Low
I/O
BVSEL
3
TSIZ[0:2]
G6, F7, E7
High
Output
BVSEL
TT[0:4]
E5, E6, F6, E9, C5
High
I/O
BVSEL
WT
D3
Low
Output
BVSEL
3
VDD
H8, H10, H12, J7, J9, J11, J13, K8, K10,
K12, K14, L7, L9, L11, L13, M8, M10, M12
——
N/A
Notes:
1. OVDD supplies power to the processor bus, JTAG, and all control signals; and VDD supplies power to the processor
core and the PLL (after filtering to become AVDD). To program the I/O voltage, connect BVSEL to either GND
(selects 1.8 V) or to HRESET (selects 2.5 V). If used, the pull-down resistor should be less than 250
. For actual
recommended value of Vin or supply voltages see Table 4.
2. Unused address pins must be pulled down to GND.
3. These pins require weak pull-up resistors (for example, 4.7 k
) to maintain the control signals in the negated state
after they have been actively negated and released by the MPC7447 and other bus masters.
4. This signal selects between MPX bus mode (asserted) and 60x bus mode (negated) and will be sampled at
HRESET going high.
5. This signal must be negated during reset, by pull up to OVDD or negation by HRESET (inverse of HRESET), to
ensure proper operation.
6. Internal pull up on die.
7. Ignored in 60x bus mode.
8. These signals must be pulled down to GND if unused, or if the MPC7447 is in 60x bus mode.
9. These input signals are for factory use only and must be pulled down to GND for normal machine operation.
10.This test signal is recommended to be tied to HRESET; however, other configurations will not adversely affect
performance.
11.These signals are for factory use only and must be left unconnected for normal machine operation.
12.These input signals are for factory use only and must be pulled up to OVDD for normal machine operation.
13.This pin can externally cause a performance monitor event. Counting of the event is enabled via software.
14.This signal must be asserted during reset, by pull down to GND or assertion by HRESET, to ensure proper
operation.
Table 16. Pinout Listing for the MPC7447, 360 CBGA Package (continued)
Signal Name
Pin Number
Active
I/O
I/F Select 1
Notes
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