參數(shù)資料
型號: MC68L11F1CFN3
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, EEPROM, MICROCONTROLLER, PQCC68
封裝: PLASTIC, LCC-68
文件頁數(shù): 27/174頁
文件大?。?/td> 981K
代理商: MC68L11F1CFN3
MOTOROLA
TIMING SYSTEM
MC68HC11F1
9-16
TECHNICAL DATA
Figure 9-3 Pulse Accumulator
Pulse accumulator control bits are also located within two timer registers, TMSK2 and
TFLG2, as described in the following paragraphs.
9.6.1 Pulse Accumulator Control Register
Four of this register's bits control an 8-bit pulse accumulator system. Another bit en-
ables either the OC5 function or the IC4 function, while two other bits select the rate
for the real-time interrupt system.
Table 9-5 Pulse Accumulator Timing
Crystal Frequency
(4
E)
E Clock
(E)
Cycle Time
(1/E)
26/E
(64/E)
PACNT Overflow
(16384/E)
4.0 MHz
1.0 MHz
1000 ns
64
s
16.384 ms
8.0 MHz
2.0 MHz
500 ns
32
s
8.192 ms
12.0 MHz
3.0 MHz
333 ns
21.33
s
5.461 ms
16.0 MHz
4.0 MHz
250 ns
16.0
s
4.096 ms
PEDGE
PAMOD
PAEN
PACTL CONTROL
INTERNAL
DATA BUS
PACNT 8-BIT COUNTER
PA7/
PAI/
OC1
INTERRUPT
REQUESTS
PAIF
PAOVF
TFLG2 INTERRUPT STATUS
PAOVI
PAII
PAOVF
PAOVI
PAIF
PAII
TMSK2 INT ENABLES
1
2
OVERFLOW
ENABLE
DISABLE
FLAG SETTING
CLOCK
PAI EDGE
PAEN
2:1
MUX
OUTPUT
BUFFER
INPUT BUFFER
AND
EDGE DETECTOR
FROM
MAIN TIMER
OC1
DATA BUS
PIN
E
÷ 64 CLOCK
(FROM MAIN TIMER)
FROM DATA
DIRECTION
BIT FOR
PORT A PIN 7
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