參數(shù)資料
型號(hào)： MC68L11F1CFN3
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, EEPROM, MICROCONTROLLER, PQCC68
封裝： PLASTIC, LCC-68
文件頁數(shù)： 126/174頁
文件大小： 981K
代理商： MC68L11F1CFN3
MC68HC11F1
OPERATING MODES AND ON-CHIP MEMORY
MOTOROLA
TECHNICAL DATA
4-17
ERASE — Erase/Normal Control for EEPROM
Can be read or written any time.
0 = Normal read or program mode
1 = Erase mode
EELAT — EEPROM Latch Control
Can be read or written any time. When EELAT equals one, writes to EEPROM cause
address and data to be latched.
0 = EEPROM address and data bus configured for normal reads
1 = EEPROM address and data bus configured for programming or erasing
EEPGM — EEPROM Program Command
Can be read any time. Can only be written while EELAT = 1.
0 = Program or erase voltage switched off to EEPROM array
1 = Program or erase voltage switched on to EEPROM array
4.4.3 CONFIG Register Programming
Because the CONFIG register is implemented with EEPROM cells, use EEPROM pro-
cedures to erase and program this register. The procedure for programming is the
same as for programming a byte in the EEPROM array, except that the CONFIG reg-
ister address is used. CONFIG can be programmed or erased (including byte erase)
while the MCU is operating in any mode, provided that PTCON in BPROT is clear. To
change the value in the CONFIG register, complete the following procedure. Do not
initiate a reset until the procedure is complete. The new value will not take effect until
after the next reset sequence.
1. Erase the CONFIG register.
2. Program the new value to the CONFIG address.
3. Initiate reset.
P indicates a previously programmed bit. P(L) indicates that the bit resets to the logic
level held in the EEPROM bit prior to reset, but the function of COP is controlled by
DISR bit in TEST1 register.
Table 4-7 EEPROM Erase Mode Control
BYTE
ROW
Action
0
Bulk Erase (All 512 Bytes)
0
1
Row Erase (16 Bytes)
1
0
Byte Erase
1
Byte Erase
CONFIG — System Configuration Register
$103F
Bit 7
654321
Bit 0
EE3
EE2
EE1
EE0
—
NOCOP
—
EEON
RESET:
11111
P
1
Single Chip
11111
P(L)
1
Bootstrap
P
P1P1P
Expanded
PPPP
1
P(L)
1
0
Special Test
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