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參數(shù)資料
| 型號： | MC68HC912BL16FU8 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | QFP-64 |
| 文件頁數(shù)： | 4/128頁 |
| 文件大?。?/td> | 3326K |
| 代理商： | MC68HC912BL16FU8 |
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MC68HC912BL16TS/D
101
0 = Configure the corresponding I/O pin for input only
1 = Configure the corresponding I/O pin for output
DDS0 — Data Direction for Port S Bit 2 and Bit 0
If the SCI receiver is configured for two-wire SCI operation, corresponding port S pins will be input re-
gardless of the state of these bits.
DDS1 — Data Direction for Port S Bit 1
If the SCI transmitter is configured for two-wire SCI operation, corresponding port S pins will be output
regardless of the state of these bits.
DDS2, DDRS3 — Data Direction for Port S Bit 2 and Bit 3
Port S[3:2] are not bonded out to any pin in MC68HC912BL16.
DDS[6:4] — Data Direction for Port S Bits 6 through 4
If the SPI is enabled and expects the corresponding port S pin to be an input, it will be an input regard-
less of the state of the DDRS bit. If the SPI is enabled and expects the bit to be an output, it will be an
output only if the DDRS bit is set.
DDS7 — Data Direction for Port S Bit 7
In SPI slave mode, DDS7 has no meaning or effect; the PS7 pin is dedicated as the SS input. In SPI
master mode, DDS7 determines whether PS7 is an error detect input to the SPI or a general-purpose
or slave select output line.
Read or write anytime.
NOTE
Port S[3:2] are not bonded out to any pin in MC68HC912BL16.
RDPS2 — Reduce Drive of PS[7:4]
0 = Port S output drivers for bits 7 through 4 operate normally.
1 = Port S output pins for bits 7 through 4 have reduced drive capability for lower power and less
noise.
RDPS1 — Reduce Drive of PS[3:2]
0 = Port S output drivers for bits 3 and 2 operate normally.
1 = Port S output pins for bits 3 and 2 have reduced drive capability for lower power and less noise.
RDPS0 — Reduce Drive of PS[1:0]
0 = Port S output drivers for bits 1 and 0 operate normally.
1 = Port S output pins for bits 1 and 0 have reduced drive capability for lower power and less noise.
PUPS2 — Pull-Up Port S Enable PS[7:4]
0 = No internal pull-ups on port S bits 7 through 4.
1 = Port S input pins for bits 7 through 4 have an active pull-up device. If a pin is programmed as
output, the pull-up device becomes inactive.
PUPS1 — Pull-Up Port S Enable PS[3:2]
0 = No internal pull-ups on port S bits 3 and 2.
1 = Port S input pins for bits 3 and 2 have an active pull-up device. If a pin is programmed as output,
the pull-up device becomes inactive.
PURDS — Pull-Up and Reduced Drive for Port S
$00DB
Bit 7
6
5
4
3
2
1
Bit 0
0
RDPS2
RDPS1
RDPS0
0
PUPS2
PUPS1
PUPS0
RESET:
0
1
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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