參數(shù)資料
型號(hào): MC68HC912BL16FU8
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP64
封裝: QFP-64
文件頁(yè)數(shù): 120/128頁(yè)
文件大?。?/td> 3326K
代理商: MC68HC912BL16FU8
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MC68HC912BL16TS/D
91
WAKE — Wakeup by Address Mark/Idle
0 = Wake up by IDLE line recognition
1 = Wake up by address mark (last data bit set)
ILT — Idle Line Type
Determines which of two types of idle line detection will be used by the SCI receiver.
0 = Short idle line mode is enabled.
1 = Long idle line mode is detected.
In the short mode, the SCI circuitry begins counting ones in the search for the idle line condition imme-
diately after the start bit. This means that the stop bit and any bits that were ones before the stop bit
could be counted in that string of ones, resulting in earlier recognition of an idle line.
In the long mode, the SCI circuitry does not begin counting ones in the search for the idle line condition
until a stop bit is received. Therefore, the last byte’s stop bit and preceding “1” bits do not affect how
quickly an idle line condition can be detected.
PE — Parity Enable
0 = Parity is disabled.
1 = Parity is enabled.
PT — Parity Type
If parity is enabled, this bit determines even or odd parity for both the receiver and the transmitter.
0 = Even parity is selected. An even number of ones in the data character causes the parity bit to
be zero and an odd number of ones causes the parity bit to be one.
1 = Odd parity is selected. An odd number of ones in the data character causes the parity bit to be
zero and an even number of ones causes the parity bit to be one.
Read or write anytime.
TIE — Transmit Interrupt Enable
0 = TDRE interrupts disabled
1 = SCI interrupt will be requested whenever the TDRE status flag is set.
TCIE — Transmit Complete Interrupt Enable
0 = TC interrupts disabled
1 = SCI interrupt will be requested whenever the TC status flag is set.
RIE — Receiver Interrupt Enable
0 = RDRF and OR interrupts disabled
1 = SCI interrupt will be requested whenever the RDRF status flag or the OR status flag is set.
ILIE — Idle Line Interrupt Enable
0 = IDLE interrupts disabled
1 = SCI interrupt will be requested whenever the IDLE status flag is set.
TE — Transmitter Enable
0 = Transmitter disabled
1 = SCI transmit logic is enabled and the TXD pin (port S bit 1) is dedicated to the transmitter. The
TE bit can be used to queue an idle preamble.
RE — Receiver Enable
0 = Receiver disabled
1 = Enables the SCI receive circuitry
SC0CR2 — SCI Control Register 2
$00C3
Bit 7
6
5
4
3
2
1
Bit 0
TIE
TCIE
RIE
ILIE
TE
RE
RWU
SBK
RESET:
0
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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