參數(shù)資料
型號： MC68HC05JB3JDW
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 3 MHz, MICROCONTROLLER, PDSO28
封裝： SOIC-28
文件頁數(shù)： 139/148頁
文件大?。?/td> 1600K
代理商： MC68HC05JB3JDW
GENERAL RELEASE SPECIFICATION
November 5, 1998
MOTOROLA
UNIVERSAL SERIAL BUS MODULE
MC68HC05JB3
10-22
REV 1
EOPIE — End of Packet Detect Interrupt Enable
This read/write bit enables the USB to generate an interrupt when the EOPF bit
becomes set. Reset clears this bit.
1 =
USB interrupts enabled for Transmit Endpoints 1 and 2.
0 =
USB interrupts disabled for Transmit Endpoint 1 and 2.
TXD1FR — Endpoint 1/Endpoint 2 Transmit Flag Reset
Writing a logic 1 to this write only bit will clear the TXD1F bit if it is set. Writing a
logic 0 to TXD1FR has no effect. Reset clears this bit.
EOPFR — End of Packet Flag Reset
Writing a logic 1 to this write only bit will clear the EOPF bit if it is set. Writing a
logic 0 to the EOPFR has no effect. Reset clears this bit.
10.5.4 USB Control Register 0 (UCR0)
T0SEQ — Endpoint 0 Transmit Sequence Bit
This read/write bit determines which type of data packet (DATA0 or DATA1) will
be sent during the next IN transaction. Toggling of this bit must be controlled by
software. Reset clears this bit.
1 =
DATA1 Token active for next Endpoint 0 transmit.
0 =
DATA0 Token active for next Endpoint 0 transmit.
STALL0 — Endpoint 0 Force Stall Bit
This read/write bit causes Endpoint 0 to return a STALL handshake when
polled by either an IN or OUT token by the USB Host Controller. The USB hard-
ware clears this bit when a SETUP token is received. Reset clears this bit.
1 =
Send STALL handshake.
0 =
Default.
TX0E — Endpoint 0 Transmit Enable
This read/write bit enables a transmit to occur when the USB Host controller
sends an IN token to Endpoint 0. Software should set this bit when data is
ready to be transmitted. It must be cleared by software when no more Endpoint
0 data needs to be transmitted.
If this bit is 0 or the TXD0F is set, the USB will respond with a NAK handshake
to any Endpoint 0 IN tokens. Reset clears this bit.
1 =
Data is ready to be sent.
0 =
Data is not ready. Respond with NAK.
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
UCR0
R
T0SEQ
STALL0
TX0E
RX0E
TP0SIZ3 TP0SIZ2 TP0SIZ1 TP0SIZ0
$003B
W
reset:
00000000
Figure 10-23. USB Control Register 0 (UCR0)
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