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參數(shù)資料
| 型號(hào)： | MC68HC05JB3JDW |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 3 MHz, MICROCONTROLLER, PDSO28 |
| 封裝： | SOIC-28 |
| 文件頁(yè)數(shù)： | 128/148頁(yè) |
| 文件大?。?/td> | 1600K |
| 代理商： | MC68HC05JB3JDW |
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GENERAL RELEASE SPECIFICATION
November 5, 1998
MOTOROLA
UNIVERSAL SERIAL BUS MODULE
MC68HC05JB3
10-12
REV 1
10.4.2 USB Transceiver
The USB transceiver provides the physical interface to the USB D+ and D– data
lines. The transceiver is composed of two parts: an output drive circuit and a
differential receiver.
10.4.2.1 Output Driver Characteristics
The USB transceiver uses a differential output driver to drive the USB data signal
onto the USB cable. The static output swing of the driver in its low state is below
the VOL of 0.3 V with a 1.5 k load to 3.6 V and in its high state is above the VOH
of 2.8 V with a 15 k
load to ground. The output swings between the differential
high and low state are well balanced to minimize signal skew. Slew rate control on
the driver is used to minimize the radiated noise and cross talk. The driver’s
outputs support three-state operation to achieve bi-directional half duplex
operation. The driver can tolerate a voltage on the signal pins of –0.5 V to 3.8 V
with respect to local ground reference without damage.
10.4.2.2 Low Speed (1.5 Mbs) Driver Characteristics
The rise and fall time of the signals on this cable are greater than 75 ns to keep
RFI emissions under FCC class B limits, and less than 300 ns to limit timing
delays and signaling skews and distortions. The driver reaches the specied static
signal levels with smooth rise and fall times, and minimal reections and ringing
when driving the cable. This driver is used only on network segments between low
speed devices and the ports to which they are connected.
Figure 10-12. Low Speed Driver Signal Waveforms
10.4.3 Receiver Characteristics
USB data transmission is done with differential signals. A differential input receiver
is used to accept the USB data signal. A differential 1 on the bus is represented by
D+ being at least 200 mV more positive than D– as seen at the receiver, and a
differential 0 is represented by D– being at least 200 mV more positive than D+ as
seen at the receiver. The signal cross over point must be between 1.3V and 2.0V.
ONE BIT
TIME
(1.5 Mb/s)
SIGNAL PINS
PASS OUTPUT SPEC
LEVELS WITH MINIMAL
REFLECTIONS AND RINGING
VSE (min)
VSE (max)
VSS
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相關(guān)代理商/技術(shù)參數(shù) |
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| MC68HC05JJ6 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:General Release Specification Microcontrollers |
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| MC68HC05JJ6CP | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:General Release Specification Microcontrollers |
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