參數(shù)資料
型號(hào): MC68HC05BS8FB
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.2 MHz, MICROCONTROLLER, PQFP44
封裝: PLASTIC, QFP-44
文件頁(yè)數(shù): 113/128頁(yè)
文件大小: 9691K
代理商: MC68HC05BS8FB
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MC68HC05BS8
SYNC SIGNAL PROCESSOR
9
9.10.2
Vertical Frequency Register (VFR)
This 9-bit (the 9th bit is in bit 7 of LFHR at $0C) read only register is used to calculate the vertical
frame frequency. A 10-bit counter counts the number of internal clocks between two VSYNC
pulses. The counted value will then be transferred to this register. The data corresponds to the
period of one vertical frame. This register can be read to determine if the frame frequency is valid,
and to determine the video mode. Note that data is valid only if VDET= 1.
The frame frequency is calculated by 1/((VFR
±1 + 240)x16t
CYC).
Table 9-1 shows sample values for the Vertical Frequency register, all VFR numbers are in
hexadecimal
.
9.10.3
Line Frequency Registers (LFRs)
This 12-bit read only register pair contains the number of lines in each vertical frame. An internal
line counter counts the number of horizontal sync pulses between two vertical sync pulses and
then transfers the counted value to this register. The data can be read to determine if the line
frequency is valid, and to determine the video mode. Note that data is valid only if
HDET=VDET= 1.
The VF8 bit is the ninth bit of the Vertical Frequency register (VFR).
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
VFR
$000B
VF7
VF6
VF5
VF4
VF3
VF2
VF1
VF0
0000 0000
Table 9-1 Vertical Frame Frequencies
VFR
Min. Freq.
Max. Freq.
VFR
Min. Freq.
Max. Freq.
$004
127.6
128.6
$1FA
41.8
41.9
$005
127.0
128.1
$1FB
41.8
$006
126.5
127.6
$1FC
41.7
41.8
$007
126.0
127.0
$1FD
41.7
41.8
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
LFHR
$000C
VF8
LF11
LF10
LF9
LF8
0000 0000
LFLR
$000D
LF7
LF6
LF5
LF4
LF3
LF2
LF1
LF0
0000 0000
TPG
83
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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