
MOTOROLA
MC68341 USER’S MANUAL
11-7
An equation for the chip select access time, tCSDV, can be developed as follows:
tCSDV = tcyc(Nc – 1) – ts9 – ts27
where:
tcyc = system clock period
Nc = number of clocks per access
ts9 = CLKOUT low to CS≈ asserted = 30 ns maximum at 16.78 MHz
ts27 = data-in valid to CLKOUT low setup = 5 ns minimum at 16.78 MHz
Using these equations, the memory access times at 16.78 MHz are shown in Table 11-1.
See Section 12 Electrical Characteristics for more timing information.
Table 11-1. Memory Access Times at 16.78 MHz
Access Time
N = 2
N = 3
N = 4
N = 5
N = 6
tADV
54 ns
114 ns
173 ns
233 ns
292 ns
tCSDV
24 ns
84 ns
143 ns
203 ns
263 ns
The values can be used to determine how many clock cycles an access will take, given
the access time of the memory devices and any delays through buffers or external logic
that may be needed.
11.2.3 Calculating Frequency-Adjusted Output
The general relationship between the CLKOUT and most input and output signals is
shown in Figure 11-11. Most outputs transition off of a falling edge of CLKOUT, but the
same principle applies to those outputs that transition off of a rising edge.
CLKOUT
OUTPUTS
ASYNCHRONOUS
INPUTS
t d
t su
h
t
Figure 11-11. Signal Relationships to CLKOUT
For outputs that are referenced to a clock edge, the propagation delay (td ) does not
change as the frequency changes. For instance, specification 6 in the electrical
characteristics, shown in Section 12 Electrical Characteristics, shows that address,
function code, and size information is valid 3 to 30 ns after the rising edge of S0. This
specification does not change even if the device frequency is less than 16.78 MHz.
Additionally, the relationship between the asynchronous inputs and the clock edge, as
shown in Figure 11-11, does not change as frequency changes.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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