參數(shù)資料
型號: MC56F8255VLD
廠商: Freescale Semiconductor
文件頁數(shù): 51/88頁
文件大?。?/td> 0K
描述: DSC 64K FLASH 60MHZ 44-LQFP
標準包裝: 160
系列: 56F8xxx
核心處理器: 56800E
芯體尺寸: 16-位
速度: 60MHz
連通性: CAN,I²C,LIN,SCI,SPI
外圍設備: LVD,POR,PWM,WDT
輸入/輸出數(shù): 35
程序存儲器容量: 64KB(32K x 16)
程序存儲器類型: 閃存
RAM 容量: 4K x 16
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉換器: A/D 8x12b,D/A 1x12b
振蕩器型: 內部
工作溫度: -40°C ~ 105°C
封裝/外殼: 44-LQFP
包裝: 管件
Specifications
MC56F825x/MC56F824x Digital Signal Controller, Rev. 3
Freescale Semiconductor
55
7.7
Supply Current Characteristics
The following table specifies supply current characteristics.
Table 24. Current Consumption
Mode
Conditions
Typical @ 3.3 V
25°C
(mA)
Maximum @ 3.6 V
105°C,125°C
(mA)
IDD1
1 No output switching
All ports configured as inputs
All inputs low
No DC loads
IDDA
IDD1
IDDA
RUN
60 MHz device clock
Relaxation oscillator on
PLL powered on
Continuous MAC instructions with fetches from
program flash memory
All peripheral modules enabled; TMRs and SCIs
using 1X Clock
ADC/DAC powered on and clocked
Comparator powered on
92
38
97
44
WAIT
60 MHz device clock
Relaxation oscillator on
PLL powered on
Processor core in WAIT state
All peripheral modules enabled; TMRs and SCIs
using 1X Clock
ADC/DAC/comparator powered off
49
4.5
53
5.5
STOP
4 MHz device clock
Relaxation oscillator on
PLL powered off
Processor core in STOP state
All peripheral module and core clocks are off
ADC/DAC/comparator powered off
8.0
3.6
9.2
4.9
STANDBY >
STOP
100 kHz device clock
Relaxation oscillator in standby mode
PLL powered off
Processor core in STOP state
All peripheral module and core clocks are off
ADC/DAC/comparator powered off
Voltage regulator in standby mode
0.76
0
3.0
0
POWERDOWN
Device clock is off
Relaxation oscillator powered off
PLL powered off
Processor core in STOP state
All peripheral module and core clocks are off
ADC /DAC/comparator powered off
Voltage regulator in standby mode
0.66
0
2.0
0
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