- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄10986 > MC56F8255VLD (Freescale Semiconductor)DSC 64K FLASH 60MHZ 44-LQFP PDF資料下載
參數(shù)資料
| 型號： | MC56F8255VLD |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 43/88頁 |
| 文件大小： | 0K |
| 描述： | DSC 64K FLASH 60MHZ 44-LQFP |
| 標準包裝： | 160 |
| 系列： | 56F8xxx |
| 核心處理器： | 56800E |
| 芯體尺寸： | 16-位 |
| 速度： | 60MHz |
| 連通性： | CAN，I²C，LIN，SCI，SPI |
| 外圍設備： | LVD，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 35 |
| 程序存儲器容量： | 64KB（32K x 16） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 4K x 16 |
| 電壓 - 電源 (Vcc/Vdd)： | 3 V ~ 3.6 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 8x12b，D/A 1x12b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 105°C |
| 封裝/外殼： | 44-LQFP |
| 包裝： | 管件 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁當前第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁
MC56F825x/MC56F824x Digital Signal Controller, Rev. 3
Specifications
Freescale Semiconductor
48
6.2.4
Flash Lockout Recovery without Mass Erase
6.2.4.1
Without Presenting Back Door Access Keys to the Flash Unit
A user can unsecure a secured device by programming the word 0x0000 into program flash location 0x00 7FF7. After
completing the programming, the JTAG TAP controller and the device must be reset to return to normal unsecured operation.
The user is responsible for directing the device to invoke the flash programming subroutine to reprogram the word 0x0000 into
program flash location 0x00 7FF7. You can do so, for example, by toggling a specific pin or downloading a user-defined key
through serial interfaces.
NOTE
Flash contents can be programmed only from ones to zeroes.
6.2.4.2
Presenting Back Door Access Key to the Flash Unit
The user can temporarily bypass security through a “back door” access scheme, using a four-word key to temporarily unlock
the flash. “Back door” access requires support from the embedded software. This software would typically permit an external
user to enter the four-word code through one of the communications interfaces and then use it to attempt the unlock sequence.
If the input matches the four-word code stored at location 0x00 7FFC–0x00 7FFF in the flash memory, the device immediately
becomes unsecured (at runtime) and internal memory is accessible via the JTAG/EOnCE port. Refer to the device’s reference
manual for details. The key must be entered in four consecutive accesses to the flash, so this routine should be designed to run
in RAM.
6.3
Product Analysis
To analyze a product’s failures in the field, the recommended method of unsecuring a secured device appears in Section 6.2.4.2,
“Presenting Back Door Access Key to the Flash Unit.” The customer must supply technical-support details about the protocol
to access the subroutines in flash memory. An alternative method for performing analysis on a secured device is to mass-erase
and reprogram the flash memory with the original code, but also to modify or not program the security word.
7
Specifications
7.1
General Characteristics
The MC56F825x/MC56F824x is fabricated in high-density, low-power, low-leakage CMOS process with 5 V–tolerant,
TTL-compatible digital inputs. The term 5 V–tolerant refers to the capability of an I/O pin, built on a 3.3 V–compatible process
technology, to withstand a voltage up to 5.5 V without damaging the device. Many systems have a mixture of devices designed
for 3.3 V and 5 V power supplies. In such systems, a bus may carry both 3.3 V–compatible and 5 V–compatible I/O voltage
levels (a standard 3.3 V I/O is designed to receive a maximum voltage of 3.3 V
± 10% during normal operation without causing
damage). This 5 V–tolerant capability therefore combines the power savings of 3.3 V I/O levels with the ability to receive 5 V
levels without damage.
CAUTION
This device contains protective circuitry to guard against damage due to high static voltage
or electrical fields. However, normal precautions are advised to avoid application of any
voltages higher than maximum-rated voltages to this high-impedance circuit. Reliability of
operation is enhanced if unused inputs are tied to an appropriate voltage level.
相關PDF資料 |
PDF描述 |
|---|---|
| VE-B6Z-IV-S | CONVERTER MOD DC/DC 2V 60W |
| MC9S08MM128CMB | IC MCU 8BIT 128K FLASH 81MAPBGA |
| VE-B6Y-IX-B1 | CONVERTER MOD DC/DC 3.3V 49.5W |
| DS21554LN | IC TXRX E1 1-CHIP 5V 100-LQFP |
| DS21552G | IC TXRX T1 1-CHIP 5V 100-BGA |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MC56F8256 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Digital Signal Controller Battery chargers and management |
| MC56F8256MLF | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC DSC 48 LQFP 64K FL RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
| MC56F8256VLF | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC DSC 48 LQFP 64K FL RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
| MC56F8257 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Digital Signal Controller Battery chargers and management |
| MC56F8257MLH | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC DSC 64 LQFP 64K FL RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
發(fā)布緊急采購，3分鐘左右您將得到回復。