參數(shù)資料
型號： MC56F8123VFBE
廠商： Freescale Semiconductor
文件頁數(shù)： 116/140頁
文件大小： 0K
描述： IC DSP 16BIT 40MHZ 64-LQFP
標準包裝： 160
系列： 56F8xxx
核心處理器： 56800E
芯體尺寸： 16-位
速度： 40MHz
連通性： SCI，SPI
外圍設備： POR，WDT
輸入/輸出數(shù)： 27
程序存儲器容量： 32KB（16K x 16）
程序存儲器類型： 閃存
RAM 容量： 8K x 8
電壓 - 電源 (Vcc/Vdd)： 2.25 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 105°C
封裝/外殼： 64-LQFP
包裝： 托盤
產(chǎn)品目錄頁面： 734 (CN2011-ZH PDF)
Register Descriptions
56F8323 Technical Data, Rev. 17
Freescale Semiconductor
77
Preliminary
5.6.14
Fast Interrupt 0 Vector Address High Register (FIVAH0)
Figure 5-16 Fast Interrupt 0 Vector Address High Register (FIVAH0)
5.6.14.1
Reserved—Bits 15–5
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
5.6.14.2
Fast Interrupt 0 Vector Address High (FIVAH0)—Bits 4–0
The upper five bits of the vector address used for Fast Interrupt 0. This register is combined with FIVAL0
to form the 21-bit vector address for Fast Interrupt 0 defined in the FIM0 register.
5.6.15
Fast Interrupt 1 Match Register (FIM1)
Figure 5-17 Fast Interrupt 1 Match Register (FIM1)
5.6.15.1
Reserved—Bits 15–7
This bit field is reserved or not implemented. It is read as 0, but cannot be modified by writing.
5.6.15.2
Fast Interrupt 1 Vector Number (FAST INTERRUPT 1)—Bits 6–0
This value determines which IRQ will be a Fast Interrupt 1. Fast interrupts vector directly to a service
routine based on values in the Fast Interrupt Vector Address registers without having to go to a jump table
first; for details, see Part 5.3.3. IRQs used as fast interrupts must be set to priority level 2. Unexpected
results will occur if a fast interrupt vector is set to any other priority. Fast interrupts automatically become
the highest-priority level 2 interrupt, regardless of their location in the interrupt table, prior to being
declared as fast interrupt. Fast Interrupt 0 has priority over Fast Interrupt 1. To determine the vector
number of each IRQ, refer to Table 4-3.
Base + $D
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
0
FAST INTERRUPT 0
VECTOR ADDRESS HIGH
Write
RESET
00000
0000000
0000
Base + $E
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
0
FAST INTERRUPT 1
Write
RESET
00000
0000000
0000
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