參數(shù)資料
型號: MC16V1CPU20B1
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, 20.97 MHz, MICROCONTROLLER, PQFP100
封裝: TQFP-100
文件頁數(shù): 91/128頁
文件大小: 571K
代理商: MC16V1CPU20B1
MC68HC16V1
MOTOROLA
MC68HC16V1TS/D
65
SPACE[1:0] — Address Space
This option field allows the chip select to respond to address spaces which are indicated by the function
codes generated by the CPU. The CPU16 normally operates in supervisor space, but interrupt acknowl-
edge must take place in CPU space. Table 44 shows SPACE field encoding.
PROG/DATA[1:0] — Program/Data Space
The PROG/DATA bits are defined to decode program and data space as shown in Table 44.
This field only affects the response of chip selects and does not affect interrupt recognition by the CPU.
1. The SLIM can only perform a two-clock access when running in non-
multiplexed mode. Two-clock accesses are not supported in multi-
plexed mode, and the SLIM may not properly execute such bus cycles
if they are attempted.
1. The CPU16 executes code only in supervisor mode, therefore, this space field encod-
ing has no effect. Supervisor/user space is equivalent to supervisor space encoding.
Table 43 DTACK Field Encoding
DTACK[3:0]
Clock Cycles Required
Per Access
Wait States Inserted
Per Access
0000
21
0
0001
3
1
0010
4
2
0011
5
3
0100
6
4
0101
7
5
0110
8
6
0111
9
7
1000
10
8
1001
11
9
1010
12
10
1011
13
11
1100
14
12
1101
15
13
1110
16
14
1111
External DTACK
Table 44 SPACE Field Encoding
SPACE[1:0]
Address Space
00
CPU Space
01
User Space1
10
Supervisor Space
11
Supervisor/User Space1
Table 45 Program/Data Field Encoding
PROG/DATA[1:0]
Program/Data Space
00
Data or Program
01
Data Space
10
Program Space
11
Reserved
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